summaryrefslogtreecommitdiffstats
path: root/cli_classic.c
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2018-09-23 20:20:26 +0200
committerNico Huber <nico.h@gmx.de>2019-06-06 15:54:46 +0000
commit2e50cdc494bf4e44c01e9e331b82a3633b1d9ef2 (patch)
tree78a7f9d9a0dd67f97d25e60c02a10e9785590fbf /cli_classic.c
parentba22411335f26601a76dbdf0d74a71e932b7cff8 (diff)
downloadflashrom-2e50cdc494bf4e44c01e9e331b82a3633b1d9ef2.tar.gz
flashrom-2e50cdc494bf4e44c01e9e331b82a3633b1d9ef2.tar.bz2
flashrom-2e50cdc494bf4e44c01e9e331b82a3633b1d9ef2.zip
Rework internal bus handling and laptop bail-out
We used to bail out on any unknown laptop. However, modern systems with SPI flashes don't suffer from the original problem. Even if a flash chip is shared with the EC, the latter has to expect the host to send regular JEDEC SPI commands any time. So instead of bailing out, we limit the set of buses to probe. If we suspect to be running on a laptop, we only allow probing of SPI and opaque programmers. The user can still use the existing force options to probe all buses. This will obsolete some board-enables that could be moved to `print.c` in follow-up commits. Change-Id: I1dbda8cf0c10d7786106f14f0d18c3dcce35f0a3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/28716 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'cli_classic.c')
0 files changed, 0 insertions, 0 deletions