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| author | Edward O'Callaghan <quasisec@google.com> | 2022-09-05 11:09:28 +1000 |
|---|---|---|
| committer | Anastasia Klimchuk <aklm@chromium.org> | 2022-10-31 05:17:45 +0000 |
| commit | 4f013087a7c5c5c90107e8a9355019bcab94e9b4 (patch) | |
| tree | 537b0e14e1eb7ca987b7501788267c7c9e0176fc /cli_classic.c | |
| parent | 2e00f736714c3117354106c502a8c89b23896b2b (diff) | |
| download | flashrom-4f013087a7c5c5c90107e8a9355019bcab94e9b4.tar.gz flashrom-4f013087a7c5c5c90107e8a9355019bcab94e9b4.tar.bz2 flashrom-4f013087a7c5c5c90107e8a9355019bcab94e9b4.zip | |
flashrom.c: Move count_max_decode_exceeding() to cli
The count_max_decode_exceeding() function is only ever called
within the cli_classic logic so move it there and make it
static. This further cleans up the flashrom.c symbol namespace.
Change-Id: If050eab7db8560676c03d5005a2b391313a0d642
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68438
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'cli_classic.c')
| -rw-r--r-- | cli_classic.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/cli_classic.c b/cli_classic.c index d258cb4c8..b66094ccd 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -516,6 +516,49 @@ _free_ret: return ret; } +/* Returns the number of buses commonly supported by the current programmer and flash chip where the latter + * can not be completely accessed due to size/address limits of the programmer. */ +static unsigned int count_max_decode_exceedings(const struct flashctx *flash) +{ + unsigned int limitexceeded = 0; + uint32_t size = flash->chip->total_size * 1024; + enum chipbustype buses = flash->mst->buses_supported & flash->chip->bustype; + + if ((buses & BUS_PARALLEL) && (max_rom_decode.parallel < size)) { + limitexceeded++; + msg_pdbg("Chip size %u kB is bigger than supported " + "size %u kB of chipset/board/programmer " + "for %s interface, " + "probe/read/erase/write may fail. ", size / 1024, + max_rom_decode.parallel / 1024, "Parallel"); + } + if ((buses & BUS_LPC) && (max_rom_decode.lpc < size)) { + limitexceeded++; + msg_pdbg("Chip size %u kB is bigger than supported " + "size %u kB of chipset/board/programmer " + "for %s interface, " + "probe/read/erase/write may fail. ", size / 1024, + max_rom_decode.lpc / 1024, "LPC"); + } + if ((buses & BUS_FWH) && (max_rom_decode.fwh < size)) { + limitexceeded++; + msg_pdbg("Chip size %u kB is bigger than supported " + "size %u kB of chipset/board/programmer " + "for %s interface, " + "probe/read/erase/write may fail. ", size / 1024, + max_rom_decode.fwh / 1024, "FWH"); + } + if ((buses & BUS_SPI) && (max_rom_decode.spi < size)) { + limitexceeded++; + msg_pdbg("Chip size %u kB is bigger than supported " + "size %u kB of chipset/board/programmer " + "for %s interface, " + "probe/read/erase/write may fail. ", size / 1024, + max_rom_decode.spi / 1024, "SPI"); + } + return limitexceeded; +} + int main(int argc, char *argv[]) { const struct flashchip *chip = NULL; |