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| author | Edward O'Callaghan <quasisec@google.com> | 2020-12-01 21:00:42 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-12-01 23:15:52 +0000 |
| commit | b1e61bcf9c7bf95aa8afbaa8836f5c893762142a (patch) | |
| tree | f69a2da195e6d7aa8324ab077177a81c7a1d0713 /flash.h | |
| parent | f95cc8f9f607626e72fad812262bc38af954fbb2 (diff) | |
| download | flashrom-b1e61bcf9c7bf95aa8afbaa8836f5c893762142a.tar.gz flashrom-b1e61bcf9c7bf95aa8afbaa8836f5c893762142a.tar.bz2 flashrom-b1e61bcf9c7bf95aa8afbaa8836f5c893762142a.zip | |
flash.h: Trivial indent fix of comment
Align with the properly tab indented comment on the CrOS
Flashrom side to make things consisent.
Change-Id: I09605bfec203d294077f298f8619bbc7d10cc68a
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48204
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'flash.h')
| -rw-r--r-- | flash.h | 7 |
1 files changed, 4 insertions, 3 deletions
@@ -269,9 +269,10 @@ struct flashrom_flashctx { bool verify_whole_chip; } flags; /* We cache the state of the extended address register (highest byte - of a 4BA for 3BA instructions) and the state of the 4BA mode here. - If possible, we enter 4BA mode early. If that fails, we make use - of the extended address register. */ + * of a 4BA for 3BA instructions) and the state of the 4BA mode here. + * If possible, we enter 4BA mode early. If that fails, we make use + * of the extended address register. + */ int address_high_byte; bool in_4ba_mode; }; |