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authorNamyoon Woo <namyoon@google.com>2020-08-27 16:03:16 -0700
committerEdward O'Callaghan <quasisec@chromium.org>2020-09-07 00:52:34 +0000
commit3149822cd45cb2e5841e15d648783748ba1b2ec6 (patch)
treeab0402c097da74a0e2bcc66f44a098349eb78c9c /flashchips.c
parent0e787b2e79ce838031b63666bc3c319788ee6a7e (diff)
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support variable-size SPI chip for dummy programmer
This is designed for firmware updater to pack firmware image preserving some specific partitions in any size. BUG=none TEST=ran the command line below: $ flashrom -p dummy:image=${TMP_FILE},size=16777216, \ emulate=VARIABLE_SIZE -w ${IMG} -V -f $ flashrom -p dummy:image=${TMP_FILE},size=auto, \ emulate=VARIABLE_SIZE -w ${IMG} -V -f Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Iff266e151459561b126ecfd1c47420b385be1db2 Reviewed-on: https://review.coreboot.org/c/flashrom/+/44879 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index 8b5b5ccbf..6fced9eeb 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -18759,6 +18759,27 @@ const struct flashchip flashchips[] = {
{
.vendor = "Generic",
+ .name = "Variable Size SPI chip",
+ .bustype = BUS_SPI,
+ .manufacture_id = PROGMANUF_ID,
+ .model_id = PROGDEV_ID,
+ .total_size = 64, /* This size is set temporarily */
+ .page_size = 256,
+ .tested = TEST_OK_PREW,
+ .probe = probe_variable_size,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {64 * 1024, 1} },
+ .block_erase = spi_block_erase_d8,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "Generic",
.name = "unknown SPI chip (RDID)",
.bustype = BUS_SPI,
.manufacture_id = GENERIC_MANUF_ID,