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| author | Nico Huber <nico.h@gmx.de> | 2022-05-24 14:30:12 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2022-06-22 13:42:15 +0000 |
| commit | 418916428f38e86368c980cc7efdf5c9c615f7cd (patch) | |
| tree | 4d6a3729a4403c9203a76b5d74c517a82f971a19 /flashchips.c | |
| parent | dad68dd9eb8455f4bbdc36b4152aa4d737dcf5d7 (diff) | |
| download | flashrom-418916428f38e86368c980cc7efdf5c9c615f7cd.tar.gz flashrom-418916428f38e86368c980cc7efdf5c9c615f7cd.tar.bz2 flashrom-418916428f38e86368c980cc7efdf5c9c615f7cd.zip | |
flashchips: Rename FEATURE_4BA_EXT_ADDR -> _EAR_C5C8
There are two competing sets of instructions to access the extended
address register of 4BA SPI chips. Some chips even support both sets.
To prepare for other instructions than the default 0xc5/0xc8, rename
the original feature flag.
Signed-off-by: Nico Huber <nico.h@gmx.de>
Change-Id: Iacb7b68a9e3444fe28873ff0fe5e3fab16643c8c
Ticket: https://ticket.coreboot.org/issues/357
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64635
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'flashchips.c')
| -rw-r--r-- | flashchips.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/flashchips.c b/flashchips.c index a893eab29..c740d1c89 100644 --- a/flashchips.c +++ b/flashchips.c @@ -17620,7 +17620,7 @@ const struct flashchip flashchips[] = { /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | - FEATURE_4BA_EXT_ADDR | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | + FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_WRSR2, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, @@ -19800,7 +19800,7 @@ const struct flashchip flashchips[] = { /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | - FEATURE_4BA_EXT_ADDR | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | + FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_WRSR2, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, @@ -19850,7 +19850,7 @@ const struct flashchip flashchips[] = { /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN - | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ, + | FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, |