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authorAnastasia Klimchuk <aklm@chromium.org>2023-06-02 18:27:41 +1000
committerAnastasia Klimchuk <aklm@chromium.org>2023-06-11 09:32:00 +0000
commit5dabb7c423f188e143eb1e32c7a8fc781f308d9b (patch)
tree5fd960a4654922edb50239b5cf1b9205729bbc2e /flashchips.c
parent1c22de20eaa34f7ab9a5e53fb91c51212471d509 (diff)
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flashchips: Mark S25FL128L as tested for probe, read, write, erase
As reported on the mailing list: https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/3CC54GMEBXYVOXBJ7J5NZ5R4SQ42ZOXC/ Change-Id: I0700d3e4f684db096fea63eb9bc5add44e246758 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/75604 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index 3e19659c6..ff8014021 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -16654,7 +16654,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* 4 x 256B Security Region (OTP) */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_WRSR_EXT3 | FEATURE_OTP,
- .tested = TEST_UNTESTED,
+ .tested = TEST_OK_PREW,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =