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authorNamyoon Woo <namyoon@google.com>2020-08-27 16:27:49 -0700
committerEdward O'Callaghan <quasisec@chromium.org>2020-09-07 00:54:16 +0000
commit79da18f86945784eb3b7134ee0abcaa71231d517 (patch)
treedcf9da3b585206b425b217471fc6e876339c722a /flashchips.c
parent84fc9e889d91276761a7d9c3fe9f7a763615a013 (diff)
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support 4-byte address format for VARIABLE_SIZE dummy flash device
This patch adds a support of 4-byte address format for VARIABLE_SIZE dummy flash device, so that it can emulate an flash size larger than 16 MBytes. - assigned a feature bits FEATURE_4BA to VARIABLE_SIZE flash config. - added codes handling two commands, JEDEC_READ_4BA and JEDEC_BYTE_PROGRAM_4BA. - changed blockeraser to use Chip-Erase command so that it can be free from flash address byte format. TEST=ran the command line below: $ flashrom -p dummy:image=${TMP_FILE},size=33554432, \ emulate=VARIABLE_SIZE -w ${IMG_32MB} -V -f $ flashrom -p dummy:image=${TMP_FILE},size=16777216, \ emulate=VARIABLE_SIZE -w ${IMG_16MB} -V -f $ flashrom -p dummy:image=${TMP_FILE},size=8388608, \ emulate=VARIABLE_SIZE -w ${IMG_8MB} -V -f Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: Ia59eecfcbe798d50f8dacea98c3c508edf8ec77e Reviewed-on: https://review.coreboot.org/c/flashrom/+/44881 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index 6fced9eeb..7d10abf54 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -18765,13 +18765,14 @@ const struct flashchip flashchips[] = {
.model_id = PROGDEV_ID,
.total_size = 64, /* This size is set temporarily */
.page_size = 256,
+ .feature_bits = FEATURE_4BA,
.tested = TEST_OK_PREW,
.probe = probe_variable_size,
.block_erasers =
{
{
.eraseblocks = { {64 * 1024, 1} },
- .block_erase = spi_block_erase_d8,
+ .block_erase = spi_block_erase_c7,
}
},
.write = spi_chip_write_256,