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| author | Nico Huber <nico.huber@secunet.com> | 2022-06-20 19:32:16 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2022-06-23 14:40:18 +0000 |
| commit | e8ce432faafc6794540a2e074af34e5d1fabf138 (patch) | |
| tree | 5f29d039eeca210ab7bf930c5d72e20c57300371 /flashchips.c | |
| parent | d90e2b3e2c37aa63e0dbb4e7359e8043704d815b (diff) | |
| download | flashrom-e8ce432faafc6794540a2e074af34e5d1fabf138.tar.gz flashrom-e8ce432faafc6794540a2e074af34e5d1fabf138.tar.bz2 flashrom-e8ce432faafc6794540a2e074af34e5d1fabf138.zip | |
flashchips: Enable FEATURE_4BA_EAR_1716 for ISSI chips
According to their datasheets, ISSI IS25LP256 and IS25WP256 support
both 0xc5/0xc8 and 0x17/0x16 opcodes to write / read their extended
address register. Flashrom will use 0xc5 by default if available,
so adding the FEATURE_4BA_EAR_1716 flag makes no difference for now
(FEATURE_4BA_EAR_C5C8 is included in the already selected FEATURE_4BA
set). It's better to have a comprehensive description of the chips,
though, in case somebody wants to use them in the future with a
master that restricts available opcodes.
Change-Id: I03e4ff825c7742e7ff79b51b75293d53a091d4d4
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'flashchips.c')
| -rw-r--r-- | flashchips.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/flashchips.c b/flashchips.c index b45054c40..5edf6a200 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7469,7 +7469,8 @@ const struct flashchip flashchips[] = { .page_size = 256, /* supports SFDP */ /* OTP: 1024B total; read 0x68; write 0x62, erase 0x64, read ID 0x4B */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_4BA_ENTER_EAR7, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | + FEATURE_4BA | FEATURE_4BA_ENTER_EAR7 | FEATURE_4BA_EAR_1716, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -7644,7 +7645,8 @@ const struct flashchip flashchips[] = { .page_size = 256, /* supports SFDP */ /* OTP: 1024B total; read 0x68; write 0x62, erase 0x64, read ID 0x4B */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_4BA_ENTER_EAR7, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | + FEATURE_4BA | FEATURE_4BA_ENTER_EAR7 | FEATURE_4BA_EAR_1716, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, |