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| author | Nico Huber <nico.huber@secunet.com> | 2016-05-03 13:38:28 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-05-29 14:56:51 +0000 |
| commit | 7590d1a9375e94d01cef08a2bde10a05177d5829 (patch) | |
| tree | a69d185d67f2b7d846d5f92b358b917b82696b0a /flashrom.8.tmpl | |
| parent | f9a30554803a670f9b95a7794be00f03929d6ecd (diff) | |
| download | flashrom-7590d1a9375e94d01cef08a2bde10a05177d5829.tar.gz flashrom-7590d1a9375e94d01cef08a2bde10a05177d5829.tar.bz2 flashrom-7590d1a9375e94d01cef08a2bde10a05177d5829.zip | |
Enable writes with active ME
Replace the `ich_spi_force` logic with more helpful warnings. These can
be hidden later, in case the necessary switches are detected. Also,
demote some warnings about settings that are the default nowadays (e.g.
SPI configuration lock, inaccessible ME region).
Change-Id: I94a5e7074b845c227e43d76d04dd1a71082a1cef
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/26261
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'flashrom.8.tmpl')
| -rw-r--r-- | flashrom.8.tmpl | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index e732bcf21..a3528f14a 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -490,14 +490,7 @@ partitioned in multiple so called "Flash Regions" containing the host firmware, the ME firmware and so on respectively. The flash descriptor can also specify up to 5 so called "Protected Regions", which are freely chosen address ranges independent from the aforementioned "Flash Regions". All of them can be write -and/or read protected individually. If flashrom detects such a lock it will -disable write support unless the user forces it with the -.sp -.B " flashrom \-p internal:ich_spi_force=yes" -.sp -syntax. If this leads to erase or write accesses to the flash it would most -probably bring it into an inconsistent and unbootable state and we will not -provide any support in such a case. +and/or read protected individually. .sp If you have an Intel chipset with an ICH2 or later southbridge and if you want to set specific IDSEL values for a non-default flash chip or an embedded |