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authorNikolai Artemiev <nartemiev@google.com>2021-11-11 21:15:44 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2022-04-21 01:15:08 +0000
commita8204dd34d90ac9ab2783e1dd486ec781d4c0dba (patch)
tree95a688a172673e95460741baf0016dbad4595ccd /flashrom.8.tmpl
parente41620ec061b07d1b18c5a6d7bd46f07c1192b6c (diff)
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cli_classic: add writeprotect CLI and update man page
Tested with: GD25LQ128, GD25Q32, GD25Q256. BUG=b:195381327,b:153800563 BRANCH=none TEST=flashrom -{r,w,E} TEST=flashrom --wp-{enable,disable,range,region,list,status} Change-Id: I499f521781ee8999921996517802c0c0c641d869 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Diffstat (limited to 'flashrom.8.tmpl')
-rw-r--r--flashrom.8.tmpl35
1 files changed, 32 insertions, 3 deletions
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index bf8960fb9..db6d619f5 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -48,8 +48,10 @@ flashrom \- detect, read, write, verify and erase flash chips
\fB\-p\fR <programmername>[:<parameters>] [\fB\-c\fR <chipname>]
(\fB\-\-flash\-name\fR|\fB\-\-flash\-size\fR|
[\fB\-E\fR|\fB\-x\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\fB\-v\fR <file>]
- [(\fB\-l\fR <file>|\fB\-\-ifd|\fB \-\-fmap\fR|\fB\-\-fmap-file\fR <file>)
+ [(\fB\-l\fR <file>|\fB\-\-ifd\fR|\fB \-\-fmap\fR|\fB\-\-fmap-file\fR <file>)
[\fB\-i\fR <image>[:<file>]]]
+ [\fB\-\-wp\-status\fR] [\fB\-\-wp\-list\fR] [\fB\-\-wp\-enable\fR|\fB\-\-wp\-disable\fR]
+ [\fB\-\-wp\-range\fR <start>,<length>|\fB\-\-wp\-region\fR <region>]
[\fB\-n\fR] [\fB\-N\fR] [\fB\-f\fR])]
[\fB\-V\fR[\fBV\fR[\fBV\fR]]] [\fB-o\fR <logfile>]
.SH DESCRIPTION
@@ -285,11 +287,38 @@ to the ROM, run:
.sp
.B " flashrom \-p prog \-l <layout> \-i foo:foo.bin -i bar:bar.bin -w rom.bin
.TP
+.B "\-\-wp\-status"
+Prints the flash's current status register protection mode and write protection
+range.
+.TP
+.B "\-\-wp\-list"
+Prints a list of all protection ranges that the flash supports.
+.TP
+.B "\-\-wp\-enable"
+Enables hardware status register protection (SRP) if the flash supports it.
+Once SRP is enabled, operations that change the flash's status registers
+(including \fB\-\-wp\-disable\fR and \fB\-\-wp\-range\fR) can only be performed
+if the flash's #WP pin is at an inactive logic level.
+.TP
+.B "\-\-wp\-disable"
+Disables status register protection if the flash allows it.
+.TP
+.B "\-\-wp\-range <start>,<length>"
+Configures the flash to protect a range of addresses from <start> to (<start> +
+<length> - 1), bounds inclusive. The range must be supported by the flash, see
+\fB\-\-wp\-list\fR.
+.TP
+.B "\-\-wp\-region <region>"
+Same as \fB\-\-wp\-range\fR but protects the range occupied by an image region.
+This option requires a image layout to be specified, see \fB\-\-layout\fR. The
+region must be supported by the flash, see
+\fB\-\-wp\-list\fR.
+.TP
.B "\-\-flash\-name"
-Prints out the detected flash chips name.
+Prints out the detected flash chip's name.
.TP
.B "\-\-flash\-size"
-Prints out the detected flash chips size.
+Prints out the detected flash chip's size.
.TP
.B "\-\-flash\-contents <ref\-file>"
The file contents of