ft2232_spi: clarify the comment about gpio configuration

The comment explaining gpio levels might be easily misunderstood when
the reader misses the word `output`. Add an explicit description of
handling of the GPIOL* pins to avoid that and make things even more
clear.

Change-Id: Iaceec889a65ead8cdde917f61b2a9695d440f781
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57808
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 5 insertions, 2 deletions

diff --git a/ft2232_spi.c b/ft2232_spi.c
index 0962f1c10..df156d6fa 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -89,8 +89,11 @@ static const struct dev_entry devs_ft2232spi[] = {
  * "set data bits low byte" MPSSE command that sets the initial
  * state and the direction of the I/O pins. `cs_bits` pins default
  * to high and will be toggled during SPI transactions. All other
- * output pins will be kept low all the time. On exit, all pins
- * will be reconfigured as inputs.
+ * output pins will be kept low all the time. For some programmers,
+ * some reserved GPIOL* pins are used as outputs. Free GPIOL* pins
+ * are configured as inputs, while it's possible to use one of them
+ * as additional CS# signal through the parameter `csgpiol`. On exit,
+ * all pins will be reconfigured as inputs.
  *
  * The pin offsets are as follows:
  * TCK/SK is bit 0.