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authorFelix Singer <felixsinger@posteo.net>2022-08-19 03:16:19 +0200
committerAnastasia Klimchuk <aklm@chromium.org>2022-09-08 02:12:40 +0000
commitf74e438303a0aed7a423985057d7e59a5711ddcf (patch)
tree591aa67005b958d30f4302a07900afaf037a9d38 /ft2232_spi.c
parent10f2dda8ddb69c421ce4e958e54cbd1ab63d5051 (diff)
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ft2232_spi.c: Retype variable `clock_5x` with bool
Use the bool type instead of an integer for the variable `clock_5x`, since this represents its purpose much better. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: Ie3005f9dcb2dcfe63261c52a36d865d175a0a75c Reviewed-on: https://review.coreboot.org/c/flashrom/+/66895 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'ft2232_spi.c')
-rw-r--r--ft2232_spi.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/ft2232_spi.c b/ft2232_spi.c
index 2971c2ebf..5b45d7edd 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <stdbool.h>
#include <stdio.h>
#include <strings.h>
#include <string.h>
@@ -317,7 +318,7 @@ static int ft2232_spi_init(const struct programmer_cfg *cfg)
* but the non-H chips can only run at 12 MHz. We disable the divide-by-5
* prescaler on 'H' chips so they run at 60MHz.
*/
- uint8_t clock_5x = 1;
+ bool clock_5x = true;
/* In addition to the prescaler mentioned above there is also another
* configurable one on all versions of the chips. Its divisor div can be
* set by a 16 bit value x according to the following formula:
@@ -618,7 +619,7 @@ format_error:
if (ftdic.type != TYPE_2232H && ftdic.type != TYPE_4232H && ftdic.type != TYPE_232H) {
msg_pdbg("FTDI chip type %d is not high-speed.\n", ftdic.type);
- clock_5x = 0;
+ clock_5x = false;
}
if (ftdi_usb_reset(&ftdic) < 0) {