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authorThomas Heijligen <thomas.heijligen@secunet.com>2021-12-14 16:36:05 +0100
committerNico Huber <nico.h@gmx.de>2021-12-22 12:35:00 +0000
commit49d758698a0dd166679c48b1a2785e50e9b0cc83 (patch)
treeb48b29bd4ccdc13543fab9685dc410a6a5be6613 /hwaccess_x86_io.c
parent88c871e74cb9d8b6f6f38747d1caae916364e2a2 (diff)
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hwaccess: move x86 port I/O related code into own files
Allow port I/O related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'hwaccess_x86_io.c')
-rw-r--r--hwaccess_x86_io.c87
1 files changed, 87 insertions, 0 deletions
diff --git a/hwaccess_x86_io.c b/hwaccess_x86_io.c
new file mode 100644
index 000000000..3152bfe51
--- /dev/null
+++ b/hwaccess_x86_io.c
@@ -0,0 +1,87 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <errno.h>
+#include <string.h>
+#if !defined (__DJGPP__) && !defined(__LIBPAYLOAD__)
+/* No file access needed/possible to get hardware access permissions. */
+#include <unistd.h>
+#include <fcntl.h>
+#endif
+
+#include "hwaccess_x86_io.h"
+#include "flash.h"
+
+#if USE_IOPERM
+#include <sys/io.h>
+#endif
+
+#if USE_DEV_IO
+int io_fd;
+#endif
+
+#if !(defined(__DJGPP__) || defined(__LIBPAYLOAD__))
+static int release_io_perms(void *p)
+{
+#if defined (__sun)
+ sysi86(SI86V86, V86SC_IOPL, 0);
+#elif USE_DEV_IO
+ close(io_fd);
+#elif USE_IOPERM
+ ioperm(0, 65536, 0);
+#elif USE_IOPL
+ iopl(0);
+#endif
+ return 0;
+}
+
+/* Get I/O permissions with automatic permission release on shutdown. */
+int rget_io_perms(void)
+{
+ #if defined (__sun)
+ if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
+#elif USE_DEV_IO
+ if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
+#elif USE_IOPERM
+ if (ioperm(0, 65536, 1) != 0) {
+#elif USE_IOPL
+ if (iopl(3) != 0) {
+#endif
+ msg_perr("ERROR: Could not get I/O privileges (%s).\n", strerror(errno));
+ msg_perr("You need to be root.\n");
+#if defined (__OpenBSD__)
+ msg_perr("If you are root already please set securelevel=-1 in /etc/rc.securelevel and\n"
+ "reboot, or reboot into single user mode.\n");
+#elif defined(__NetBSD__)
+ msg_perr("If you are root already please reboot into single user mode or make sure\n"
+ "that your kernel configuration has the option INSECURE enabled.\n");
+#endif
+ return 1;
+ } else {
+ register_shutdown(release_io_perms, NULL);
+ }
+ return 0;
+}
+
+#else
+
+/* DJGPP and libpayload environments have full PCI port I/O permissions by default. */
+/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
+int rget_io_perms(void)
+{
+ return 0;
+}
+#endif