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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-10 17:04:10 +0200 |
|---|---|---|
| committer | David Hendricks <david.hendricks@gmail.com> | 2021-05-16 23:14:00 +0000 |
| commit | 11a35980defbf800e33e77cc7a82e89c33865b25 (patch) | |
| tree | dd7ec6f9adb196103cf4fc7a5e57647346ed6632 /ich_descriptors.c | |
| parent | 90739d147f1d9b90789873fdbe74da6c616cad6b (diff) | |
| download | flashrom-11a35980defbf800e33e77cc7a82e89c33865b25.tar.gz flashrom-11a35980defbf800e33e77cc7a82e89c33865b25.tar.bz2 flashrom-11a35980defbf800e33e77cc7a82e89c33865b25.zip | |
Add Gemini Lake support
The SPI hardware is pretty much unchanged from Apollo Lake. However, the
IFD differs significantly enough to require special handling.
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: Ib5dcdf204166f44a8531c19b5f363b851d2ccd77
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54276
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'ich_descriptors.c')
| -rw-r--r-- | ich_descriptors.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/ich_descriptors.c b/ich_descriptors.c index 7374984dc..c5f9f8260 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -39,6 +39,7 @@ ssize_t ich_number_of_regions(const enum ich_chipset cs, const struct ich_desc_c { switch (cs) { case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: return 6; case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: @@ -68,6 +69,7 @@ ssize_t ich_number_of_masters(const enum ich_chipset cs, const struct ich_desc_c switch (cs) { case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: if (cont->NM <= MAX_NUM_MASTERS) return cont->NM; break; @@ -104,7 +106,7 @@ void prettyprint_ich_chipset(enum ich_chipset cs) "5 series Ibex Peak", "6 series Cougar Point", "7 series Panther Point", "8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg", "9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point", - "C620 series Lewisburg", "300 series Cannon Point", "Apollo Lake", + "C620 series Lewisburg", "300 series Cannon Point", "Apollo Lake", "Gemini Lake", }; if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names)) cs = 0; @@ -198,7 +200,8 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: - case CHIPSET_APOLLO_LAKE: { + case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: { uint8_t size_enc; if (idx == 0) { size_enc = desc->component.dens_new.comp1_density; @@ -269,6 +272,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value) case CHIPSET_400_SERIES_COMET_POINT: return freq_str[1][value]; case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: return freq_str[2][value]; case CHIPSET_ICH_UNKNOWN: default: @@ -286,6 +290,7 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_ case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: has_flill1 = true; break; default: @@ -462,7 +467,7 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i desc->master.mstr[i].write & (1 << j) ? 'w' : ' '); msg_pdbg2("\n"); } - } else if (cs == CHIPSET_APOLLO_LAKE) { + } else if (cs == CHIPSET_APOLLO_LAKE || cs == CHIPSET_GEMINI_LAKE) { const char *const master_names[] = { "BIOS", "TXE", }; if (nm > (ssize_t)ARRAY_SIZE(master_names)) { msg_pdbg2("%s: number of masters too high (%d).\n", __func__, desc->content.NM); @@ -922,7 +927,9 @@ static enum ich_chipset guess_ich_chipset_from_content(const struct ich_desc_con else if (content->ISL <= 16) return CHIPSET_5_SERIES_IBEX_PEAK; else if (content->FLMAP2 == 0) { - if (content->ISL != 19) + if (content->ISL == 23) + return CHIPSET_GEMINI_LAKE; + else if (content->ISL != 19) msg_pwarn("Peculiar firmware descriptor, assuming Apollo Lake compatibility.\n"); return CHIPSET_APOLLO_LAKE; } @@ -967,6 +974,7 @@ static enum ich_chipset guess_ich_chipset(const struct ich_desc_content *const c switch (guess) { case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_GEMINI_LAKE: /* `freq_read` was repurposed, so can't check on it any more. */ return guess; case CHIPSET_100_SERIES_SUNRISE_POINT: @@ -1123,6 +1131,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: if (idx == 0) { size_enc = desc->component.dens_new.comp1_density; } else { @@ -1159,6 +1168,7 @@ static uint32_t read_descriptor_reg(enum ich_chipset cs, uint8_t section, uint16 case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: mmio_le_writel(control, spibar + PCH100_REG_FDOC); return mmio_le_readl(spibar + PCH100_REG_FDOD); default: |