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authorEdward O'Callaghan <quasisec@google.com>2022-02-23 16:18:41 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2022-04-14 14:20:01 +0000
commitb01d7e9f518f47187b9bd848b801304d6d9a556d (patch)
tree72879db5ae7c877c8bb55b6eae20fc37f6c743f4 /ich_descriptors.c
parentf28262d11251260678b463cadc81cbc55d56240d (diff)
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ichspi: Add Jasper Lake support
Additionally, utilize CSSO (CPU Soft Strap Offset) to uniquely detect the chipset when the CSSL (CPU Soft Strap Length) field default value (0x03) on Jasper Lake is the same as Elkhart Lake. BUG=b:221175960 TEST=dedede with `flashrom -p internal --flash-size`. ``` $ flashrom -VVV -p internal --ifd -i fd -i bios -r /tmp/filename.rom <snip> Enabling hardware sequencing by default for 100+ series PCH. OK. No board enable found matching coreboot IDs vendor="Google", model="Magolor". The following protocols are supported: Programmer-specific. Probing for Programmer Opaque flash chip, 0 kB: Chip identified: GD25Q127C/GD25Q128C Hardware sequencing reports 1 attached SPI flash chip with a density of 16384 kB. There is only one partition containing the whole address space (0x000000 - 0xffffff). There are 4096 erase blocks with 4096 B each. Added layout entry 00000000 - 00ffffff named complete flash Found GigaDevice flash chip "GD25Q127C/GD25Q128C" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000. Found GigaDevice flash chip "GD25Q127C/GD25Q128C" (16384 kB, Programmer-specific). This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details). Reading Status register Block protection is disabled. Reading ich descriptor... Reading 4096 bytes starting at 0x000000. done. Assuming chipset 'Jasper Lake'. Added layout entry 00000000 - 00000fff named fd Added layout entry 00381000 - 00ffffff named bios Added layout entry 00001000 - 00380fff named me restore_power_management: Re-enabling power management. Using regions: "bios", "fd". Reading Status register Block protection is disabled. Reading flash... 0x381000-0xffffff:R Reading 13103104 bytes starting at 0x381000. 000000-0x0fff:R Reading 4096 bytes starting at 0x000000. done. restore_power_management: Re-enabling power management. SUCCESS Restoring PCI config space for 00:1f:5 reg 0xdc restore_power_management: Re-enabling power management. ``` Change-Id: Ib942d0b8942fe0a991b2af0b187414818485153d Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62282 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'ich_descriptors.c')
-rw-r--r--ich_descriptors.c21
1 files changed, 16 insertions, 5 deletions
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 4d85e0821..0eabe95e8 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -49,6 +49,7 @@ ssize_t ich_number_of_regions(const enum ich_chipset cs, const struct ich_desc_c
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_ELKHART_LAKE:
+ case CHIPSET_JASPER_LAKE:
return 16;
case CHIPSET_100_SERIES_SUNRISE_POINT:
return 10;
@@ -77,6 +78,7 @@ ssize_t ich_number_of_masters(const enum ich_chipset cs, const struct ich_desc_c
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_GEMINI_LAKE:
+ case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE:
if (cont->NM <= MAX_NUM_MASTERS)
return cont->NM;
@@ -115,7 +117,8 @@ void prettyprint_ich_chipset(enum ich_chipset cs)
"8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg",
"9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point",
"C620 series Lewisburg", "300 series Cannon Point", "400 series Comet Point",
- "500 series Tiger Point", "600 series Alder Point", "Meteor Lake", "Apollo Lake", "Gemini Lake", "Elkhart Lake",
+ "500 series Tiger Point", "600 series Alder Point", "Meteor Lake",
+ "Apollo Lake", "Gemini Lake", "Jasper Lake", "Elkhart Lake",
};
if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
cs = 0;
@@ -214,6 +217,7 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript
case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
+ case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE: {
uint8_t size_enc;
if (idx == 0) {
@@ -301,6 +305,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value)
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_300_SERIES_CANNON_POINT:
case CHIPSET_400_SERIES_COMET_POINT:
+ case CHIPSET_JASPER_LAKE:
return freq_str[1][value];
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -358,6 +363,7 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_
case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
+ case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE:
has_flill1 = true;
break;
@@ -482,7 +488,7 @@ void prettyprint_ich_descriptor_master(const enum ich_chipset cs, const struct i
cs == CHIPSET_400_SERIES_COMET_POINT ||
cs == CHIPSET_500_SERIES_TIGER_POINT ||
cs == CHIPSET_600_SERIES_ALDER_POINT ||
- cs == CHIPSET_METEOR_LAKE) {
+ cs == CHIPSET_JASPER_LAKE || cs == CHIPSET_METEOR_LAKE) {
const char *const master_names[] = {
"BIOS", "ME", "GbE", "unknown", "EC",
};
@@ -1047,10 +1053,12 @@ static enum ich_chipset guess_ich_chipset_from_content(const struct ich_desc_con
if (content->CSSL == 0x14)
return CHIPSET_600_SERIES_ALDER_POINT;
if (content->CSSL == 0x03) {
- if (content->CSSO == 0x70)
- return CHIPSET_METEOR_LAKE;
- else
+ if (content->CSSO == 0x58)
return CHIPSET_ELKHART_LAKE;
+ else if (content->CSSO == 0x6c)
+ return CHIPSET_JASPER_LAKE;
+ else if (content->CSSO == 0x70)
+ return CHIPSET_METEOR_LAKE;
}
msg_pwarn("Unknown flash descriptor, assuming 500 series compatibility.\n");
return CHIPSET_500_SERIES_TIGER_POINT;
@@ -1076,6 +1084,7 @@ static enum ich_chipset guess_ich_chipset(const struct ich_desc_content *const c
case CHIPSET_600_SERIES_ALDER_POINT:
case CHIPSET_METEOR_LAKE:
case CHIPSET_GEMINI_LAKE:
+ case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE:
/* `freq_read` was repurposed, so can't check on it any more. */
break;
@@ -1235,6 +1244,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
+ case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE:
if (idx == 0) {
size_enc = desc->component.dens_new.comp1_density;
@@ -1276,6 +1286,7 @@ static uint32_t read_descriptor_reg(enum ich_chipset cs, uint8_t section, uint16
case CHIPSET_METEOR_LAKE:
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
+ case CHIPSET_JASPER_LAKE:
case CHIPSET_ELKHART_LAKE:
mmio_le_writel(control, spibar + PCH100_REG_FDOC);
return mmio_le_readl(spibar + PCH100_REG_FDOD);