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| author | Subrata Banik <subratabanik@google.com> | 2022-04-07 19:55:32 +0000 |
|---|---|---|
| committer | Anastasia Klimchuk <aklm@chromium.org> | 2022-05-03 05:12:15 +0000 |
| commit | 005aa915a0c687e8d73a3ed5b52735e8d3faf80a (patch) | |
| tree | d9810cc7b052f24f3450e158948254c3276955de /ichspi.c | |
| parent | d3bd399f673aeac07873d0117ec17fd8cc1e497b (diff) | |
| download | flashrom-005aa915a0c687e8d73a3ed5b52735e8d3faf80a.tar.gz flashrom-005aa915a0c687e8d73a3ed5b52735e8d3faf80a.tar.bz2 flashrom-005aa915a0c687e8d73a3ed5b52735e8d3faf80a.zip | |
ichspi: Introduce HSFC CYCLE READ/WRITE/ERASE macros
This patch introduces useful macros (read/write/erase) and uses these
macros throughout the SPI operations.
Additionally, implicitly using the HSFC_CYCLE_READ macro for the SPI
read operation.
BUG=b:223630977
TEST=Able to perform read/write/erase operation on PCH 600 series
chipset (board name: Brya).
Additionally, no difference in flashrom binary seen while comparing
flashrom binary generated with CB:62888 and between CB:62888 to
CB:62868 below:
flashrom$ cmp flashrom flashrom_old
<<none>>
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3ea74b668e5f8d8e4b3da2a8ad8b81f1813e1e80
Reviewed-on: https://review.coreboot.org/c/flashrom/+/62868
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'ichspi.c')
| -rw-r--r-- | ichspi.c | 8 |
1 files changed, 6 insertions, 2 deletions
@@ -128,6 +128,9 @@ #define HSFC_FCYCLE_OFF 1 /* 1-2: FLASH Cycle */ #define HSFC_FCYCLE_MASK(n) ((n) << HSFC_FCYCLE_OFF) #define HSFC_FCYCLE HSFC_FCYCLE_MASK(ICH9_HSFC_FCYCLE_BIT_WIDTH) +#define HSFC_CYCLE_READ HSFC_FCYCLE_MASK(0) +#define HSFC_CYCLE_WRITE HSFC_FCYCLE_MASK(2) +#define HSFC_CYCLE_BLOCK_ERASE HSFC_FCYCLE_MASK(3) /* 3-7: reserved */ #define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ #define HSFC_FDBC (0x3f << HSFC_FDBC_OFF) @@ -1430,7 +1433,7 @@ static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr, hsfc = REGREAD16(ICH9_REG_HSFC); hsfc &= ~hwseq_data.hsfc_fcycle; /* clear operation */ - hsfc |= (0x3 << HSFC_FCYCLE_OFF); /* set erase operation */ + hsfc |= HSFC_CYCLE_BLOCK_ERASE; /* set erase operation */ hsfc |= HSFC_FGO; /* start */ msg_pdbg("HSFC used for block erasing: "); prettyprint_ich9_reg_hsfc(hsfc, ich_generation); @@ -1473,6 +1476,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf, hsfc = REGREAD16(ICH9_REG_HSFC); hsfc &= ~hwseq_data.hsfc_fcycle; /* set read operation */ hsfc &= ~HSFC_FDBC; /* clear byte count */ + hsfc |= HSFC_CYCLE_READ; /* set read operation */ /* set byte count */ hsfc |= HSFC_FDBC_VAL(block_len - 1); hsfc |= HSFC_FGO; /* start */ @@ -1518,7 +1522,7 @@ static int ich_hwseq_write(struct flashctx *flash, const uint8_t *buf, unsigned hsfc = REGREAD16(ICH9_REG_HSFC); hsfc &= ~hwseq_data.hsfc_fcycle; /* clear operation */ - hsfc |= (0x2 << HSFC_FCYCLE_OFF); /* set write operation */ + hsfc |= HSFC_CYCLE_WRITE; /* set write operation */ hsfc &= ~HSFC_FDBC; /* clear byte count */ /* set byte count */ hsfc |= HSFC_FDBC_VAL(block_len - 1); |