diff options
| author | Edward O'Callaghan <quasisec@google.com> | 2020-07-16 15:37:26 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-07-16 22:26:20 +0000 |
| commit | 4c9b416379f2d0df7612b788189264028d2fc809 (patch) | |
| tree | 5fa70da41a34accb11f5c4b657a4b6a0c02df4f6 /ichspi.c | |
| parent | 556fe8d53da8d0d5fa20b83fb27ffa93a1697149 (diff) | |
| download | flashrom-4c9b416379f2d0df7612b788189264028d2fc809.tar.gz flashrom-4c9b416379f2d0df7612b788189264028d2fc809.tar.bz2 flashrom-4c9b416379f2d0df7612b788189264028d2fc809.zip | |
ichspi.c: Make ich_set_bbar() parameteric on ich_generation
Work towards dropping ich_generation global usage and make
the ich_set_bbar() function pure.
Change-Id: I6da6dccb413cbafa2fbaca213574f22c7a258139
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/43500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'ichspi.c')
| -rw-r--r-- | ichspi.c | 10 |
1 files changed, 5 insertions, 5 deletions
@@ -714,10 +714,10 @@ static int ich_missing_opcodes(void) * Try to set BBAR (BIOS Base Address Register), but read back the value in case * it didn't stick. */ -static void ich_set_bbar(uint32_t min_addr) +static void ich_set_bbar(uint32_t min_addr, enum ich_chipset ich_gen) { int bbar_off; - switch (ich_generation) { + switch (ich_gen) { case CHIPSET_ICH7: case CHIPSET_TUNNEL_CREEK: case CHIPSET_CENTERTON: @@ -1811,7 +1811,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) ichspi_lock = 1; } ich_init_opcodes(ich_gen); - ich_set_bbar(0); + ich_set_bbar(0, ich_gen); register_spi_master(&spi_master_ich7); break; case CHIPSET_ICH8: @@ -1946,7 +1946,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) default: ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); msg_pdbg("0x%x: 0x%08x (BBAR)\n", ICH9_REG_BBAR, ichspi_bbar); - ich_set_bbar(0); + ich_set_bbar(0, ich_gen); break; } @@ -2099,7 +2099,7 @@ int via_init_spi(uint32_t mmio_base) ichspi_lock = 1; } - ich_set_bbar(0); + ich_set_bbar(0, ich_generation); ich_init_opcodes(ich_generation); return 0; |