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| author | Thomas Heijligen <thomas.heijligen@secunet.com> | 2022-06-23 14:38:35 +0200 |
|---|---|---|
| committer | Thomas Heijligen <src@posteo.de> | 2022-06-27 08:56:00 +0000 |
| commit | b554cdc91e7c30f6fa55316ecae902f1e11b3ab1 (patch) | |
| tree | 6f54baa9303f1481fc1e7b950e441796fdc51651 /ichspi.c | |
| parent | d41595e207107f3716535f6fb128a32db6c2fefa (diff) | |
| download | flashrom-b554cdc91e7c30f6fa55316ecae902f1e11b3ab1.tar.gz flashrom-b554cdc91e7c30f6fa55316ecae902f1e11b3ab1.tar.bz2 flashrom-b554cdc91e7c30f6fa55316ecae902f1e11b3ab1.zip | |
tree: indent struct *_master consistently with tabs
Use `<tab>.key<tab>*= <value>,`
TEST: `make VERSION=0 MAN_DATE=0` returns the same flashrom binary
before and after the patch
Change-Id: I1c45ea9804ca09e040d7ac98255042f58b01f8ef
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65363
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'ichspi.c')
| -rw-r--r-- | ichspi.c | 58 |
1 files changed, 29 insertions, 29 deletions
@@ -1785,34 +1785,34 @@ static void ich9_set_pr(const size_t reg_pr0, int i, int read_prot, int write_pr } static const struct spi_master spi_master_ich7 = { - .max_data_read = 64, - .max_data_write = 64, - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - .write_aai = default_spi_write_aai, + .max_data_read = 64, + .max_data_write = 64, + .command = ich_spi_send_command, + .multicommand = ich_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, }; static const struct spi_master spi_master_ich9 = { - .max_data_read = 64, - .max_data_write = 64, - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - .write_aai = default_spi_write_aai, + .max_data_read = 64, + .max_data_write = 64, + .command = ich_spi_send_command, + .multicommand = ich_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, }; static const struct opaque_master opaque_master_ich_hwseq = { - .max_data_read = 64, - .max_data_write = 64, - .probe = ich_hwseq_probe, - .read = ich_hwseq_read, - .write = ich_hwseq_write, - .erase = ich_hwseq_block_erase, - .read_register = ich_hwseq_read_status, - .write_register = ich_hwseq_write_status, + .max_data_read = 64, + .max_data_write = 64, + .probe = ich_hwseq_probe, + .read = ich_hwseq_read, + .write = ich_hwseq_write, + .erase = ich_hwseq_block_erase, + .read_register = ich_hwseq_read_status, + .write_register = ich_hwseq_write_status, }; static int init_ich7_spi(void *spibar, enum ich_chipset ich_gen) @@ -2208,13 +2208,13 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) } static const struct spi_master spi_master_via = { - .max_data_read = 16, - .max_data_write = 16, - .command = ich_spi_send_command, - .multicommand = ich_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - .write_aai = default_spi_write_aai, + .max_data_read = 16, + .max_data_write = 16, + .command = ich_spi_send_command, + .multicommand = ich_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, }; int via_init_spi(uint32_t mmio_base) |