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| author | Nico Huber <nico.h@gmx.de> | 2022-05-24 15:07:34 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2022-06-23 14:38:08 +0000 |
| commit | d90e2b3e2c37aa63e0dbb4e7359e8043704d815b (patch) | |
| tree | 0299fa7ae376cd15ea45bf8b2d7729c0dda0d9dd /include/spi.h | |
| parent | 418916428f38e86368c980cc7efdf5c9c615f7cd (diff) | |
| download | flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.tar.gz flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.tar.bz2 flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.zip | |
flashchips,spi25: Replace `.wrea_override` with FEATURE_4BA_EAR_1716
There are two competing sets of instructions to access the extended
address register of 4BA SPI chips. Some chips even support both sets.
So far, we assumed the 0xc5/0xc8 instructions by default and allowed
to override the write instructions with the `.wrea_override` field.
This has some disadvantages:
* The additional field is easily overlooked. So when adding a new
flash chip, one might assume only 0xc5/0xc8 are supported.
* We cannot describe flash chips completely that allow both
instructions (and some programmers may be picky about which
instructions can be used).
Therefore, replace the `.wrea_override` field with a feature flag.
Signed-off-by: Nico Huber <nico.h@gmx.de>
Change-Id: I6d82f24898acd0789203516a7456fd785907bc10
Ticket: https://ticket.coreboot.org/issues/357
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'include/spi.h')
| -rw-r--r-- | include/spi.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/spi.h b/include/spi.h index 05d2239a4..9b38cab64 100644 --- a/include/spi.h +++ b/include/spi.h @@ -175,9 +175,11 @@ /* Write Extended Address Register */ #define JEDEC_WRITE_EXT_ADDR_REG 0xC5 +#define ALT_WRITE_EXT_ADDR_REG_17 0x17 /* Read Extended Address Register */ #define JEDEC_READ_EXT_ADDR_REG 0xC8 +#define ALT_READ_EXT_ADDR_REG_16 0x16 /* Read the memory */ #define JEDEC_READ 0x03 |