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authorEdward O'Callaghan <quasisec@google.com>2020-10-26 19:08:42 +1100
committerAngel Pons <th3fanbus@gmail.com>2020-10-28 12:53:27 +0000
commit74fd0300b8d4a58d3838963f60c9f16451d1db78 (patch)
tree2f449df89f9b763687a58e3f8915c38e0daa2a15 /internal.c
parentdad2f7c3367edf5c8964a9f77c03c1638c24c275 (diff)
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internal.c: De-maze the pre-processor wraps a little
This makes it again easier to parse internal.c by consolidating some processor wraps and labeling the ends of others. BUG=none BRANCH=none TEST=builds Change-Id: I32fb1a3fff7afa671f08fb2cc2ad406772f5e10f Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/46815 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'internal.c')
-rw-r--r--internal.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/internal.c b/internal.c
index 5d74f92c2..4390b452f 100644
--- a/internal.c
+++ b/internal.c
@@ -113,7 +113,7 @@ int register_superio(struct superio s)
return 0;
}
-#endif
+#endif /* IS_X86 */
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
@@ -281,9 +281,7 @@ int internal_init(void)
msg_pinfo("Continuing anyway.\n");
}
}
-#endif
-#if IS_X86
is_laptop = 2; /* Assume that we don't know by default. */
dmi_init();
@@ -299,7 +297,7 @@ int internal_init(void)
* FIXME: Find a replacement for DMI on non-x86.
* FIXME: Enable Super I/O probing once port I/O is possible.
*/
-#endif
+#endif /* IS_X86 */
/* Check laptop whitelist. */
board_handle_before_laptop();
@@ -333,7 +331,7 @@ int internal_init(void)
ret = 1;
goto internal_init_exit;
}
-#endif
+#endif /* IS_X86 */
if (internal_buses_supported & BUS_NONSPI)
register_par_master(&par_master_internal, internal_buses_supported);