diff options
author | Edward O'Callaghan <quasisec@google.com> | 2023-01-12 13:51:24 +1100 |
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committer | Edward O'Callaghan <quasisec@chromium.org> | 2023-02-15 06:28:41 +0000 |
commit | 7c3fa6d5cd94dd90eeff2b55a510e26d18393674 (patch) | |
tree | d0b995659e9b35257c4783fc4552aa0d74c948c1 /internal_par.c | |
parent | 3a1a0684b999a68e265266651983cb0429faf288 (diff) | |
download | flashrom-7c3fa6d5cd94dd90eeff2b55a510e26d18393674.tar.gz flashrom-7c3fa6d5cd94dd90eeff2b55a510e26d18393674.tar.bz2 flashrom-7c3fa6d5cd94dd90eeff2b55a510e26d18393674.zip |
internal: Move parallel logic into internal_par implementation
The parallel internal programmer is its own implementation. Move
it and call into it from the top-level internal.c programmer
implementation.
Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71834
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'internal_par.c')
-rw-r--r-- | internal_par.c | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/internal_par.c b/internal_par.c new file mode 100644 index 000000000..e8e387cad --- /dev/null +++ b/internal_par.c @@ -0,0 +1,79 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "programmer.h" +#include "hwaccess_physmap.h" + +static void internal_chip_writeb(const struct flashctx *flash, uint8_t val, + chipaddr addr) +{ + mmio_writeb(val, (void *) addr); +} + +static void internal_chip_writew(const struct flashctx *flash, uint16_t val, + chipaddr addr) +{ + mmio_writew(val, (void *) addr); +} + +static void internal_chip_writel(const struct flashctx *flash, uint32_t val, + chipaddr addr) +{ + mmio_writel(val, (void *) addr); +} + +static uint8_t internal_chip_readb(const struct flashctx *flash, + const chipaddr addr) +{ + return mmio_readb((void *) addr); +} + +static uint16_t internal_chip_readw(const struct flashctx *flash, + const chipaddr addr) +{ + return mmio_readw((void *) addr); +} + +static uint32_t internal_chip_readl(const struct flashctx *flash, + const chipaddr addr) +{ + return mmio_readl((void *) addr); +} + +static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf, + const chipaddr addr, size_t len) +{ + mmio_readn((void *)addr, buf, len); + return; +} + +static const struct par_master par_master_internal = { + .map_flash_region = physmap, + .unmap_flash_region = physunmap, + .chip_readb = internal_chip_readb, + .chip_readw = internal_chip_readw, + .chip_readl = internal_chip_readl, + .chip_readn = internal_chip_readn, + .chip_writeb = internal_chip_writeb, + .chip_writew = internal_chip_writew, + .chip_writel = internal_chip_writel, +}; + +void internal_par_init(enum chipbustype buses) +{ + if (buses & BUS_NONSPI) + register_par_master(&par_master_internal, internal_buses_supported, NULL); +} |