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authorEdward O'Callaghan <quasisec@google.com>2020-04-12 17:27:53 +1000
committerAngel Pons <th3fanbus@gmail.com>2020-04-30 08:00:41 +0000
commite4ddc36371bc07c71889f21f9144160c756e9825 (patch)
tree013c09671b5c91189b9e75f684180252d3ef98e4 /it87spi.c
parente0272e2b6f8860152d0edf72263a80426fd7d5e3 (diff)
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const'ify flashctx to align signatures with cros flashrom
The ChromiumOS flashrom fork has since const'ify flashctx in a few places. This aligns the function signatures to match with downstream to ease forward porting patches out of downstream back into mainline flashrom. This patch is minimum viable alignment and so feedback is welcome. Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'it87spi.c')
-rw-r--r--it87spi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/it87spi.c b/it87spi.c
index f5955fe6c..8224db08e 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -98,7 +98,7 @@ void probe_superio_ite(void)
return;
}
-static int it8716f_spi_send_command(struct flashctx *flash,
+static int it8716f_spi_send_command(const struct flashctx *flash,
unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr,
unsigned char *readarr);
@@ -275,7 +275,7 @@ int init_superio_ite(void)
* commands with the address in inverse wire order. That's why the register
* ordering in case 4 and 5 may seem strange.
*/
-static int it8716f_spi_send_command(struct flashctx *flash,
+static int it8716f_spi_send_command(const struct flashctx *flash,
unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr,
unsigned char *readarr)