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author | Edward O'Callaghan <quasisec@google.com> | 2023-02-26 16:53:40 +1100 |
---|---|---|
committer | Thomas Heijligen <src@posteo.de> | 2023-02-27 10:19:52 +0000 |
commit | 4ea3f6cbf84e7e876ad16430c317a713039fc0f2 (patch) | |
tree | 9bbcea0aed5f06a55ad5b3f95279a20c35c2e4a9 /jedec.c | |
parent | 0facf12ca413adbe803c819f55938e41c440dde5 (diff) | |
download | flashrom-4ea3f6cbf84e7e876ad16430c317a713039fc0f2.tar.gz flashrom-4ea3f6cbf84e7e876ad16430c317a713039fc0f2.tar.bz2 flashrom-4ea3f6cbf84e7e876ad16430c317a713039fc0f2.zip |
jedec.c: Drop branching non-zero programmer_delay() operands
The programmer_delay() function is already tolerant upon zero
delay values and will simply just return with a NOP. Therefore
there is no need to branch.
Change-Id: Ic547669bb16e6ace4fe283e07345fc2d7075d63e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/72692
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'jedec.c')
-rw-r--r-- | jedec.c | 15 |
1 files changed, 5 insertions, 10 deletions
@@ -43,8 +43,7 @@ static void toggle_ready_jedec_common(const struct flashctx *flash, chipaddr dst tmp1 = chip_readb(flash, dst) & 0x40; while (i++ < 0xFFFFFFF) { - if (delay) - programmer_delay(flash, delay); + programmer_delay(flash, delay); tmp2 = chip_readb(flash, dst) & 0x40; if (tmp1 == tmp2) { break; @@ -203,8 +202,7 @@ int probe_jedec(struct flashctx *flash) * mode completely. Allow the chip to finish this before seeing a * reset command. */ - if (probe_timing_enter) - programmer_delay(flash, probe_timing_enter); + programmer_delay(flash, probe_timing_enter); /* Reset chip to a clean slate */ if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); @@ -215,8 +213,7 @@ int probe_jedec(struct flashctx *flash) programmer_delay(flash, 10); } chip_writeb(flash, 0xF0, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - if (probe_timing_exit) - programmer_delay(flash, probe_timing_exit); + programmer_delay(flash, probe_timing_exit); /* Issue JEDEC Product ID Entry command */ chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); @@ -226,8 +223,7 @@ int probe_jedec(struct flashctx *flash) if (probe_timing_enter) programmer_delay(flash, 10); chip_writeb(flash, 0x90, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - if (probe_timing_enter) - programmer_delay(flash, probe_timing_enter); + programmer_delay(flash, probe_timing_enter); /* Read product ID */ id1 = chip_readb(flash, bios + (0x00 << shifted)); @@ -257,8 +253,7 @@ int probe_jedec(struct flashctx *flash) programmer_delay(flash, 10); } chip_writeb(flash, 0xF0, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); - if (probe_timing_exit) - programmer_delay(flash, probe_timing_exit); + programmer_delay(flash, probe_timing_exit); msg_cdbg("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2); if (!oddparity(id1)) |