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| author | Anastasia Klimchuk <aklm@chromium.org> | 2021-05-26 09:54:08 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2021-06-03 05:19:37 +0000 |
| commit | 5f5eaeb7fa9b8443ff3656dd55041fd59582edf4 (patch) | |
| tree | 33073db96a5fc583d3f8811e7351546ec99c58ff /mcp6x_spi.c | |
| parent | 30815fc3706194117c633393d1ed65941a5afafd (diff) | |
| download | flashrom-5f5eaeb7fa9b8443ff3656dd55041fd59582edf4.tar.gz flashrom-5f5eaeb7fa9b8443ff3656dd55041fd59582edf4.tar.bz2 flashrom-5f5eaeb7fa9b8443ff3656dd55041fd59582edf4.zip | |
bitbang: Extend bitbang_spi_master functions to accept spi data
This way every bitbang spi master has access to its own spi data,
and can use this data in all its functions.
This patch only changes the signatures of functions.
BUG=b:185191942
TEST=builds
Change-Id: Id5722a43ce20feeed62630ad80e14df7744f9c02
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'mcp6x_spi.c')
| -rw-r--r-- | mcp6x_spi.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/mcp6x_spi.c b/mcp6x_spi.c index 543142bba..de4429942 100644 --- a/mcp6x_spi.c +++ b/mcp6x_spi.c @@ -41,7 +41,7 @@ static void *mcp6x_spibar = NULL; /* Cached value of last GPIO state. */ static uint8_t mcp_gpiostate; -static void mcp6x_request_spibus(void) +static void mcp6x_request_spibus(void *spi_data) { mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); mcp_gpiostate |= 1 << MCP6X_SPI_REQUEST; @@ -54,34 +54,34 @@ static void mcp6x_request_spibus(void) mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); } -static void mcp6x_release_spibus(void) +static void mcp6x_release_spibus(void *spi_data) { mcp_gpiostate &= ~(1 << MCP6X_SPI_REQUEST); mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } -static void mcp6x_bitbang_set_cs(int val) +static void mcp6x_bitbang_set_cs(int val, void *spi_data) { mcp_gpiostate &= ~(1 << MCP6X_SPI_CS); mcp_gpiostate |= (val << MCP6X_SPI_CS); mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } -static void mcp6x_bitbang_set_sck(int val) +static void mcp6x_bitbang_set_sck(int val, void *spi_data) { mcp_gpiostate &= ~(1 << MCP6X_SPI_SCK); mcp_gpiostate |= (val << MCP6X_SPI_SCK); mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } -static void mcp6x_bitbang_set_mosi(int val) +static void mcp6x_bitbang_set_mosi(int val, void *spi_data) { mcp_gpiostate &= ~(1 << MCP6X_SPI_MOSI); mcp_gpiostate |= (val << MCP6X_SPI_MOSI); mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530); } -static int mcp6x_bitbang_get_miso(void) +static int mcp6x_bitbang_get_miso(void *spi_data) { mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530); return (mcp_gpiostate >> MCP6X_SPI_MISO) & 0x1; |