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authorAlexander Goncharov <chat@joursoir.net>2022-08-11 21:47:13 +0300
committerAnastasia Klimchuk <aklm@chromium.org>2022-08-30 10:13:18 +0000
commit95b6cf183522870d65a6aa34cab0c9a2b2f0870e (patch)
tree32c0cdff817b33c51d0525802c323dad308b6b86 /nicintel_eeprom.c
parent0b654bb92e273e4facdca1c561556ef5e57c3513 (diff)
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nicintel_eeprom: turn 82580 state variable into a struct
Intel 82580 has more than just the "eec" variable. Others will be added to the structure in the next commits. TOPIC=register_master_api TEST=builds Change-Id: I66d42c6648088da7097674314dd00f34ef97119c Signed-off-by: Alexander Goncharov <chat@joursoir.net> Ticket: https://ticket.coreboot.org/issues/391 Reviewed-on: https://review.coreboot.org/c/flashrom/+/66689 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'nicintel_eeprom.c')
-rw-r--r--nicintel_eeprom.c30
1 files changed, 19 insertions, 11 deletions
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c
index 6827d9a28..0b06913c2 100644
--- a/nicintel_eeprom.c
+++ b/nicintel_eeprom.c
@@ -77,6 +77,11 @@ static bool done_i20_write = false;
#define UNPROG_DEVICE 0x1509
+struct nicintel_eeprom_data {
+ /* Intel 82580 variable(s) */
+ uint32_t eec;
+};
+
/*
* Warning: is_i210() below makes assumptions on these PCI ids.
* It may have to be updated when this list is extended.
@@ -419,12 +424,13 @@ out:
return ret;
}
-static int nicintel_ee_shutdown_82580(void *eecp)
+static int nicintel_ee_shutdown_82580(void *opaque_data)
{
+ struct nicintel_eeprom_data *data = opaque_data;
int ret = 0;
if (nicintel_pci->device_id != UNPROG_DEVICE) {
- uint32_t old_eec = *(uint32_t *)eecp;
+ uint32_t old_eec = data->eec;
/* Request bitbanging and unselect the chip first to be safe. */
if (nicintel_ee_req() || nicintel_ee_bitset(EEC, EE_CS, 1)) {
ret = -1;
@@ -441,7 +447,7 @@ static int nicintel_ee_shutdown_82580(void *eecp)
}
out:
- free(eecp);
+ free(data);
return ret;
}
@@ -463,6 +469,8 @@ static const struct opaque_master opaque_master_nicintel_ee_i210 = {
static int nicintel_ee_init(void)
{
+ uint32_t eec = 0;
+
struct pci_dev *dev = pcidev_init(nics_intel_ee, PCI_BASE_ADDRESS_0);
if (!dev)
return 1;
@@ -476,11 +484,9 @@ static int nicintel_ee_init(void)
if (!nicintel_eebar)
return 1;
- uint32_t *eecp = NULL;
-
nicintel_pci = dev;
if (dev->device_id != UNPROG_DEVICE) {
- uint32_t eec = pci_mmio_readl(nicintel_eebar + EEC);
+ eec = pci_mmio_readl(nicintel_eebar + EEC);
/* C.f. 3.3.1.5 for the detection mechanism (maybe? contradicting
the EE_PRES definition),
@@ -489,14 +495,16 @@ static int nicintel_ee_init(void)
msg_perr("Controller reports no EEPROM is present.\n");
return 1;
}
+ }
- eecp = malloc(sizeof(uint32_t));
- if (eecp == NULL)
- return 1;
- *eecp = eec;
+ struct nicintel_eeprom_data *data = calloc(1, sizeof(*data));
+ if (!data) {
+ msg_perr("Unable to allocate space for OPAQUE master data\n");
+ return 1;
}
+ data->eec = eec;
- return register_opaque_master(&opaque_master_nicintel_ee_82580, eecp);
+ return register_opaque_master(&opaque_master_nicintel_ee_82580, data);
} else {
nicintel_eebar = rphysmap("Intel i210 NIC w/ emulated EEPROM",
io_base_addr + 0x12000, MEMMAP_SIZE);