summaryrefslogtreecommitdiffstats
path: root/nicintel_eeprom.c
diff options
context:
space:
mode:
authorAnastasia Klimchuk <aklm@chromium.org>2021-08-03 11:54:56 +1000
committerNico Huber <nico.h@gmx.de>2021-08-17 16:29:23 +0000
commite44e6eb32ff1dcde3305535ecf38e74b8c736c02 (patch)
tree33e05cab6b0517eada02fdf22dbd15aaba88c731 /nicintel_eeprom.c
parent099be52132361be2aa37c19bb444b35b931abecc (diff)
downloadflashrom-e44e6eb32ff1dcde3305535ecf38e74b8c736c02.tar.gz
flashrom-e44e6eb32ff1dcde3305535ecf38e74b8c736c02.tar.bz2
flashrom-e44e6eb32ff1dcde3305535ecf38e74b8c736c02.zip
nicintel_eeprom: Check UNPROG_DEVICE in 82580 shutdown
Previously shutdown function was registered conditionally for 82580, only if the device was not UNPROG_DEVICE. This patch moves the check for UNPROG_DEVICE into shutdown function itself, so that shutdown function can be always registered for 82580. This also fixes a memory leak in nicintel_ee_shutdown_82580. No changes for i210 device init/shutdown, only for 82580. And very importantly this unlocks API change which plans to move register_shutdown inside register_opaque_master, similar to what's done in CB:56103 BUG=b:185191942 TEST=builds Change-Id: I5c729a3a63d0106e65525a6a77b2f9104c96847f Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56821 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'nicintel_eeprom.c')
-rw-r--r--nicintel_eeprom.c38
1 files changed, 24 insertions, 14 deletions
diff --git a/nicintel_eeprom.c b/nicintel_eeprom.c
index 430a980e5..ec0f04ef6 100644
--- a/nicintel_eeprom.c
+++ b/nicintel_eeprom.c
@@ -431,18 +431,26 @@ static int nicintel_ee_shutdown_i210(void *arg)
static int nicintel_ee_shutdown_82580(void *eecp)
{
- uint32_t old_eec = *(uint32_t *)eecp;
- /* Request bitbanging and unselect the chip first to be safe. */
- if (nicintel_ee_req() || nicintel_ee_bitset(EEC, EE_CS, 1))
- return -1;
+ int ret = 0;
+
+ if (nicintel_pci->device_id != UNPROG_DEVICE) {
+ uint32_t old_eec = *(uint32_t *)eecp;
+ /* Request bitbanging and unselect the chip first to be safe. */
+ if (nicintel_ee_req() || nicintel_ee_bitset(EEC, EE_CS, 1)) {
+ ret = -1;
+ goto out;
+ }
- /* Try to restore individual bits we care about. */
- int ret = nicintel_ee_bitset(EEC, EE_SCK, old_eec & BIT(EE_SCK));
- ret |= nicintel_ee_bitset(EEC, EE_SI, old_eec & BIT(EE_SI));
- ret |= nicintel_ee_bitset(EEC, EE_CS, old_eec & BIT(EE_CS));
- /* REQ will be cleared by hardware anyway after 2 seconds of inactivity on the SPI pins (3.3.2.1). */
- ret |= nicintel_ee_bitset(EEC, EE_REQ, old_eec & BIT(EE_REQ));
+ /* Try to restore individual bits we care about. */
+ ret = nicintel_ee_bitset(EEC, EE_SCK, old_eec & BIT(EE_SCK));
+ ret |= nicintel_ee_bitset(EEC, EE_SI, old_eec & BIT(EE_SI));
+ ret |= nicintel_ee_bitset(EEC, EE_CS, old_eec & BIT(EE_CS));
+ /* REQ will be cleared by hardware anyway after 2 seconds of inactivity
+ * on the SPI pins (3.3.2.1). */
+ ret |= nicintel_ee_bitset(EEC, EE_REQ, old_eec & BIT(EE_REQ));
+ }
+out:
free(eecp);
return ret;
}
@@ -465,6 +473,8 @@ static int nicintel_ee_init(void)
if (!nicintel_eebar)
return 1;
+ uint32_t *eecp = NULL;
+
nicintel_pci = dev;
if (dev->device_id != UNPROG_DEVICE) {
uint32_t eec = pci_mmio_readl(nicintel_eebar + EEC);
@@ -477,15 +487,15 @@ static int nicintel_ee_init(void)
return 1;
}
- uint32_t *eecp = malloc(sizeof(uint32_t));
+ eecp = malloc(sizeof(uint32_t));
if (eecp == NULL)
return 1;
*eecp = eec;
-
- if (register_shutdown(nicintel_ee_shutdown_82580, eecp))
- return 1;
}
+ if (register_shutdown(nicintel_ee_shutdown_82580, eecp))
+ return 1;
+
return register_opaque_master(&opaque_master_nicintel_ee_82580, NULL);
} else {
nicintel_eebar = rphysmap("Intel i210 NIC w/ emulated EEPROM",