diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-21 13:01:45 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-10-01 11:27:15 +0000 |
| commit | 724a24d70215e86db587957402d04085fad8f64e (patch) | |
| tree | df6359424119f8c4f769b31ec358875942ac7f99 /nicintel_spi.c | |
| parent | 24495cd46ee28cf60728719b8de421299ba48c44 (diff) | |
| download | flashrom-724a24d70215e86db587957402d04085fad8f64e.tar.gz flashrom-724a24d70215e86db587957402d04085fad8f64e.tar.bz2 flashrom-724a24d70215e86db587957402d04085fad8f64e.zip | |
nicintel_spi.c: Implement `set_sck_set_mosi` and `set_sck_get_miso`
Tested on a 8086:1533 (i210 GbE), reads still return the same data.
This cuts the time to read a Winbond W25Q80.V (1 MiB, SPI) from 66
seconds down to 48 seconds, i.e. a 37.5% increase in speed.
Change-Id: I52a0ae5ff331ee2ed41652eb5c2ed7ebe7253d74
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'nicintel_spi.c')
| -rw-r--r-- | nicintel_spi.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/nicintel_spi.c b/nicintel_spi.c index 2f4fd1011..5dcdf7dde 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -165,6 +165,19 @@ static void nicintel_bitbang_set_mosi(int val, void *spi_data) pci_mmio_writel(tmp, data->spibar + FLA); } +static void nicintel_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data) +{ + struct nicintel_spi_data *data = spi_data; + uint32_t tmp; + + tmp = pci_mmio_readl(data->spibar + FLA); + tmp &= ~BIT(FL_SCK); + tmp &= ~BIT(FL_SI); + tmp |= (sck << FL_SCK); + tmp |= (mosi << FL_SI); + pci_mmio_writel(tmp, data->spibar + FLA); +} + static int nicintel_bitbang_get_miso(void *spi_data) { struct nicintel_spi_data *data = spi_data; @@ -175,10 +188,24 @@ static int nicintel_bitbang_get_miso(void *spi_data) return tmp; } +static int nicintel_bitbang_set_sck_get_miso(int sck, void *spi_data) +{ + struct nicintel_spi_data *data = spi_data; + uint32_t tmp; + + tmp = pci_mmio_readl(data->spibar + FLA); + tmp &= ~BIT(FL_SCK); + tmp |= (sck << FL_SCK); + pci_mmio_writel(tmp, data->spibar + FLA); + return (tmp >> FL_SO) & 0x1; +} + static const struct bitbang_spi_master bitbang_spi_master_nicintel = { .set_cs = nicintel_bitbang_set_cs, .set_sck = nicintel_bitbang_set_sck, .set_mosi = nicintel_bitbang_set_mosi, + .set_sck_set_mosi = nicintel_bitbang_set_sck_set_mosi, + .set_sck_get_miso = nicintel_bitbang_set_sck_get_miso, .get_miso = nicintel_bitbang_get_miso, .request_bus = nicintel_request_spibus, .release_bus = nicintel_release_spibus, |