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author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2021-06-16 15:13:54 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2021-11-17 12:11:17 +0000 |
commit | 93b01904db607ef8169047e68e376dcda1bd7fbe (patch) | |
tree | e57bbe3307e6901bb0d084158877b4188be96fbe /programmer.h | |
parent | 5020cf3a6216879a1c07141bd15bc19044158767 (diff) | |
download | flashrom-93b01904db607ef8169047e68e376dcda1bd7fbe.tar.gz flashrom-93b01904db607ef8169047e68e376dcda1bd7fbe.tar.bz2 flashrom-93b01904db607ef8169047e68e376dcda1bd7fbe.zip |
Add Tiger Lake U Premium support
Tiger Lake has very low ICCRIBA (TGL=0x11, CNL=0x34 and CML=0x34) and
detects as unknown chipset compatible with 300 series chipset. Add a
new enum CHIPSET_500_SERIES_TIGER_POINT and treat it identically to
CHIPSET_400_SERIES_COMET_POINT. There are some exceptions though,
ICCRIBA is no longer present n descriptor content so a new union has
been defined for new fields and used in descriptor guessing.
freq_read field is not present on Tiger Lake, moreover in CannonPoint
and Comet Point this field is used as eSPI/EC frequency, so a new
function to print read frequency has ben added. Finally Tiger lake
boot straps include eSPI, so a new bus has been added for the new
straps.
TEST=Flash BIOS region on Intel i5-1135G7
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I28f3b6fe9f8ce9e976a6808683f46b6f4ec72bdd
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55578
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'programmer.h')
-rw-r--r-- | programmer.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/programmer.h b/programmer.h index ec9503cdf..b4f04e7ad 100644 --- a/programmer.h +++ b/programmer.h @@ -359,6 +359,7 @@ enum ich_chipset { CHIPSET_C620_SERIES_LEWISBURG, CHIPSET_300_SERIES_CANNON_POINT, CHIPSET_400_SERIES_COMET_POINT, + CHIPSET_500_SERIES_TIGER_POINT, CHIPSET_APOLLO_LAKE, CHIPSET_GEMINI_LAKE, }; |