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authorMartin Roth <gaumless@gmail.com>2022-03-15 10:55:25 -0600
committerAnastasia Klimchuk <aklm@chromium.org>2022-05-03 05:23:23 +0000
commit0f388acaba981c6c3ebee10528d88e42195f805f (patch)
tree2a951abb04a839e94f5c6640b2b63ea52c6b27cc /s25f.c
parent005aa915a0c687e8d73a3ed5b52735e8d3faf80a (diff)
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Global cleanup: Fix a few spelling errors
Just a trivial patch to fix a few errors found by codespell. Here's the command I used: codespell -S subprojects,out \ -L fwe,dout,tast,crate,parms,claus,nt,nd,te,truns,trun Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749 Reviewed-on: https://review.coreboot.org/c/flashrom/+/62840 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 's25f.c')
-rw-r--r--s25f.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/s25f.c b/s25f.c
index 82ca61069..67715ed47 100644
--- a/s25f.c
+++ b/s25f.c
@@ -17,7 +17,7 @@
/*
* s25f.c - Helper functions for Spansion S25FL and S25FS SPI flash chips.
* Uses 24 bit addressing for the FS chips and 32 bit addressing for the FL
- * chips (which is required by the overlayed sector size devices).
+ * chips (which is required by the overlaid sector size devices).
* TODO: Implement fancy hybrid sector architecture helpers.
*/
@@ -368,7 +368,7 @@ int probe_spi_big_spansion(struct flashctx *flash)
* 04h 00h FS: 256-kB physical sectors
* 04h 01h FS: 64-kB physical sectors
* 04h 00h FL: 256-kB physical sectors
- * 04h 01h FL: Mix of 64-kB and 4KB overlayed sectors
+ * 04h 01h FL: Mix of 64-kB and 4KB overlaid sectors
* 05h 80h FL family
* 05h 81h FS family
*