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authorNikolai Artemiev <nartemiev@google.com>2021-10-20 22:11:32 +1100
committerAnastasia Klimchuk <aklm@chromium.org>2022-02-28 02:35:21 +0000
commit4571361d0e2b11f43b2de5390c90705d4e8cce4a (patch)
treeaaff87499c436806000e2e7e24fdab04c5c7c0aa /s25f.c
parent8d50fad44353b65947e8de42b479ab2fe2256cd5 (diff)
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writeprotect, cli_classic: delete old writeprotect code
Delete writeprotect code that was previously extracted from the cros tree. This is the first of a series of commits adding writeprotect support. Following commits incrementally implement writeprotect operations, culminating in writeprotect support for three example chips: GD25LQ128, GD25Q32, and GD25Q256. BUG=b:195381327,b:153800563 BRANCH=none TEST=flashrom -{r,w,E} TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series Change-Id: I67e9b31f86465e5a8f7d3def637198671ee818a8 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58474 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Diffstat (limited to 's25f.c')
-rw-r--r--s25f.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/s25f.c b/s25f.c
index 2fba6bce0..0bd4a7cbe 100644
--- a/s25f.c
+++ b/s25f.c
@@ -25,7 +25,6 @@
#include "chipdrivers.h"
#include "spi.h"
-#include "writeprotect.h"
/*
* RDAR and WRAR are supported on chips which have more than one set of status