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authorNico Huber <nico.h@gmx.de>2019-06-18 23:39:56 +0200
committerNico Huber <nico.h@gmx.de>2019-06-21 11:54:19 +0000
commitd8b2e808cd46986f945ba9cf3b90c70fe58de9c6 (patch)
tree4094be4996c4ae32a78e0e13c558ee78bcdd85dc /spi.c
parent0373ce31fe5b11dcf23b27fbc221ba019a1cf7f1 (diff)
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spi: Move 16MiB partitioning up into spi_chip_read()
We enforced a 16MiB limit in spi_read_chunked() for multi-die flash chips that can't be fully read at once. The same limit can be useful for dediprog programmers. So move it into a more generic place. Change-Id: Iab1fd5b2ea550b4b3ef3e8402e0b6ca218485a51 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33613 Reviewed-by: Ryan O'Leary Reviewed-by: ron minnich <rminnich@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'spi.c')
-rw-r--r--spi.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/spi.c b/spi.c
index a4dba1973..489baf306 100644
--- a/spi.c
+++ b/spi.c
@@ -99,7 +99,19 @@ int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned i
int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
unsigned int len)
{
- return flash->mst->spi.read(flash, buf, start, len);
+ int ret;
+ size_t to_read;
+ for (; len; len -= to_read, buf += to_read, start += to_read) {
+ /* Do not cross 16MiB boundaries in a single transfer.
+ This helps with
+ o multi-die 4-byte-addressing chips,
+ o dediprog that has a protocol limit of 32MiB-512B. */
+ to_read = min(ALIGN_DOWN(start + 16*MiB, 16*MiB) - start, len);
+ ret = flash->mst->spi.read(flash, buf, start, to_read);
+ if (ret)
+ return ret;
+ }
+ return 0;
}
/*