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authorEdward O'Callaghan <quasisec@google.com>2020-05-14 15:19:42 +1000
committerEdward O'Callaghan <quasisec@chromium.org>2020-08-26 08:35:28 +0000
commit3b1294583526769b3fa2e4f4df6e4b033db14b2d (patch)
treec86c1345fc46140566c3a8277bdda4ed16a10a22 /spi.h
parenta2dc4f7fafaa5ef41510e6cbcd2cdd140c94e356 (diff)
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spi: Allow cached ID bytes to be cleared
This does two things: 1. Removes the static variables from various ID functions and moves them to a single struct. 2. Adds a function to clear the struct. The idea of the original caching mechanism introduced years ago was simply to speed up probe_flash() by not issuing the same read ID commands dozens or hundreds of times for a single chip. That implementation assumed that we would only call probe_flash() once. However, there are cases when we want to call probe_flash() multiple times, for example, if using an external programmer and using different voltages (for probing the chip). This patch is extremely similar to the original works of: `commit 57b7524b1448189d3630d6c4735e60dbbdf14d51`. Author: David Hendricks <dhendrix@chromium.org> && `commit 7f7c711ee1a41649607f81f1533e5135fc1361fc`. Author: David Hendricks <dhendrix@chromium.org> BUG=b:15656443 BRANCH=none TEST=none Change-Id: I879cb08dbe66db9ab0c3b8a7f93b04fe1c5980f4 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/41399 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'spi.h')
-rw-r--r--spi.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/spi.h b/spi.h
index 3f45038ad..c1ca46a21 100644
--- a/spi.h
+++ b/spi.h
@@ -192,4 +192,6 @@
#define SPI_FLASHROM_BUG -5
#define SPI_PROGRAMMER_ERROR -6
+void clear_spi_id_cache(void);
+
#endif /* !__SPI_H__ */