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author | Thomas Heijligen <thomas.heijligen@secunet.com> | 2022-09-19 23:31:08 +0200 |
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committer | Thomas Heijligen <src@posteo.de> | 2022-12-14 10:54:08 +0000 |
commit | cb99e8a68bd0e5c91a97ed2b4a5bf0731ff983a8 (patch) | |
tree | 4b92d558bbac40e1b88192fbc326939570c2f24b /spi25.c | |
parent | 76f28a3fc29b96c1c8cc76cba1279f92d2edc86e (diff) | |
download | flashrom-cb99e8a68bd0e5c91a97ed2b4a5bf0731ff983a8.tar.gz flashrom-cb99e8a68bd0e5c91a97ed2b4a5bf0731ff983a8.tar.bz2 flashrom-cb99e8a68bd0e5c91a97ed2b4a5bf0731ff983a8.zip |
spi25.c: Move spi_get_opcode_from_erasefn() to spi.c
Split spi_get_opcode_from_erasefn() out into spi.c to add support for
non spi25 flashes next.
Change-Id: Id654e998d0af2d3f5845336bb98b38d724519038
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67715
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'spi25.c')
-rw-r--r-- | spi25.c | 12 |
1 files changed, 0 insertions, 12 deletions
@@ -651,18 +651,6 @@ enum block_erase_func spi_get_erasefn_from_opcode(uint8_t opcode) return NO_BLOCK_ERASE_FUNC; } -uint8_t spi_get_opcode_from_erasefn(enum block_erase_func func) -{ - size_t i; - for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) { - if (function_opcode_list[i].func == func) - return function_opcode_list[i].opcode; - } - msg_cinfo("%s: unknown erase function (0x%d). Please report " - "this at flashrom@flashrom.org\n", __func__, func); - return 0x00; //Assuming 0x00 is not a erase function opcode -} - static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len) { const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_WRITE && spi_master_4ba(flash); |