1 files changed, 59 insertions, 33 deletions

diff --git a/it8212.c b/it8212.c
index ac53a6fcf..3c1161d60 100644
--- a/it8212.c
+++ b/it8212.c
@@ -17,13 +17,18 @@
 #include <stdlib.h>
 #include "flash.h"
 #include "programmer.h"
-#include "hwaccess.h"
+#include "hwaccess_physmap.h"
+#include "platform/pci.h"
 
-static uint8_t *it8212_bar = NULL;
+struct it8212_data {
+	struct pci_dev *dev;
+	uint8_t *bar;
+	uint32_t decode_access;
+};
 
 #define PCI_VENDOR_ID_ITE 0x1283
 
-const struct dev_entry devs_it8212[] = {
+static const struct dev_entry devs_it8212[] = {
 	{PCI_VENDOR_ID_ITE, 0x8212, NT, "ITE", "8212F PATA RAID"},
 
 	{0},
@@ -32,25 +37,42 @@ const struct dev_entry devs_it8212[] = {
 #define IT8212_MEMMAP_SIZE (128 * 1024)
 #define IT8212_MEMMAP_MASK (IT8212_MEMMAP_SIZE - 1)
 
-static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
-static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr);
+static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
+{
+	const struct it8212_data *data = flash->mst->par.data;
+
+	pci_mmio_writeb(val, data->bar + (addr & IT8212_MEMMAP_MASK));
+}
+
+static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr)
+{
+	const struct it8212_data *data = flash->mst->par.data;
+
+	return pci_mmio_readb(data->bar + (addr & IT8212_MEMMAP_MASK));
+}
+
+static int it8212_shutdown(void *par_data)
+{
+	struct it8212_data *data = par_data;
+
+	/* Restore ROM BAR decode state. */
+	pci_write_long(data->dev, PCI_ROM_ADDRESS, data->decode_access);
+
+	free(par_data);
+	return 0;
+}
+
 static const struct par_master par_master_it8212 = {
-		.chip_readb		= it8212_chip_readb,
-		.chip_readw		= fallback_chip_readw,
-		.chip_readl		= fallback_chip_readl,
-		.chip_readn		= fallback_chip_readn,
-		.chip_writeb		= it8212_chip_writeb,
-		.chip_writew		= fallback_chip_writew,
-		.chip_writel		= fallback_chip_writel,
-		.chip_writen		= fallback_chip_writen,
+	.chip_readb	= it8212_chip_readb,
+	.chip_writeb	= it8212_chip_writeb,
+	.shutdown	= it8212_shutdown,
 };
 
-int it8212_init(void)
+static int it8212_init(const struct programmer_cfg *cfg)
 {
-	if (rget_io_perms())
-		return 1;
+	uint8_t *bar;
 
-	struct pci_dev *dev = pcidev_init(devs_it8212, PCI_ROM_ADDRESS);
+	struct pci_dev *dev = pcidev_init(cfg, devs_it8212, PCI_ROM_ADDRESS);
 	if (!dev)
 		return 1;
 
@@ -59,24 +81,28 @@ int it8212_init(void)
 	if (!io_base_addr)
 		return 1;
 
-	it8212_bar = rphysmap("IT8212F flash", io_base_addr, IT8212_MEMMAP_SIZE);
-	if (it8212_bar == ERROR_PTR)
+	bar = rphysmap("IT8212F flash", io_base_addr, IT8212_MEMMAP_SIZE);
+	if (bar == ERROR_PTR)
 		return 1;
 
-	/* Restore ROM BAR decode state automatically at shutdown. */
-	rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
+	struct it8212_data *data = calloc(1, sizeof(*data));
+	if (!data) {
+		msg_perr("Unable to allocate space for PAR master data\n");
+		return 1;
+	}
+	data->dev = dev;
+	data->bar = bar;
 
-	max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
-	register_par_master(&par_master_it8212, BUS_PARALLEL);
-	return 0;
-}
+	/* Enable ROM BAR decoding. */
+	data->decode_access = pci_read_long(dev, PCI_ROM_ADDRESS);
+	pci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
 
-static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
-{
-	pci_mmio_writeb(val, it8212_bar + (addr & IT8212_MEMMAP_MASK));
-}
-
-static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr)
-{
-	return pci_mmio_readb(it8212_bar + (addr & IT8212_MEMMAP_MASK));
+	max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
+	return register_par_master(&par_master_it8212, BUS_PARALLEL, data);
 }
+const struct programmer_entry programmer_it8212 = {
+	.name			= "it8212",
+	.type			= PCI,
+	.devs.dev		= devs_it8212,
+	.init			= it8212_init,
+};