diff options
Diffstat (limited to 'it87spi.c')
| -rw-r--r-- | it87spi.c | 84 |
1 files changed, 41 insertions, 43 deletions
@@ -19,15 +19,15 @@ * Contains the ITE IT87* SPI specific routines */ -#if defined(__i386__) || defined(__x86_64__) - #include <string.h> +#include <stdbool.h> #include <stdlib.h> #include <errno.h> #include "flash.h" #include "chipdrivers.h" #include "programmer.h" -#include "hwaccess.h" +#include "hwaccess_physmap.h" +#include "hwaccess_x86_io.h" #include "spi.h" #define ITE_SUPERIO_PORT1 0x2e @@ -40,7 +40,7 @@ struct it8716f_spi_data { uint16_t flashport; /* use fast 33MHz SPI (<>0) or slow 16MHz (0) */ - int fast_spi; + bool fast_spi; }; static int get_data_from_context(const struct flashctx *flash, struct it8716f_spi_data **data) @@ -134,9 +134,20 @@ static int it8716f_spi_page_program(struct flashctx *flash, const uint8_t *buf, OUTB(0, data->flashport); /* Wait until the Write-In-Progress bit is cleared. * This usually takes 1-10 ms, so wait in 1 ms steps. + * + * FIXME: This should timeout after some number of retries. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(1000); + while (true) { + uint8_t status; + int ret = spi_read_register(flash, STATUS1, &status); + if (ret) + return ret; + + if((status & SPI_SR_WIP) == 0) + return 0; + + default_delay(1000); + } return 0; } @@ -232,7 +243,7 @@ static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf, if (get_data_from_context(flash, &data) < 0) return SPI_GENERIC_ERROR; - data->fast_spi = 0; + data->fast_spi = false; /* FIXME: Check if someone explicitly requested to use IT87 SPI although * the mainboard does not use IT87 SPI translation. This should be done @@ -278,7 +289,10 @@ static int it8716f_spi_chip_write_256(struct flashctx *flash, const uint8_t *buf } while (len >= chip->page_size) { - it8716f_spi_page_program(flash, buf, start); + int ret = it8716f_spi_page_program(flash, buf, start); + if (ret) + return ret; + update_progress(flash, FLASHROM_PROGRESS_WRITE, chip->page_size - len, chip->page_size); start += chip->page_size; len -= chip->page_size; buf += chip->page_size; @@ -290,31 +304,32 @@ static int it8716f_spi_chip_write_256(struct flashctx *flash, const uint8_t *buf return 0; } -static struct spi_master spi_master_it87xx = { +static int it8716f_shutdown(void *data) +{ + free(data); + return 0; +} + +static const struct spi_master spi_master_it87xx = { .max_data_read = 3, .max_data_write = MAX_DATA_UNSPECIFIED, .command = it8716f_spi_send_command, - .multicommand = default_spi_send_multicommand, + .map_flash_region = physmap, + .unmap_flash_region = physunmap, .read = it8716f_spi_chip_read, .write_256 = it8716f_spi_chip_write_256, .write_aai = spi_chip_write_1, + .shutdown = it8716f_shutdown, }; - -static int it8716f_shutdown(void *data) -{ - free(data); - return 0; -} - -static uint16_t it87spi_probe(uint16_t port) +static uint16_t it87spi_probe(const struct programmer_cfg *cfg, uint16_t port) { uint8_t tmp = 0; uint16_t flashport = 0; enter_conf_mode_ite(port); - char *param = extract_programmer_param("dualbiosindex"); + char *param = extract_programmer_param_str(cfg, "dualbiosindex"); if (param != NULL) { sio_write(port, 0x07, 0x07); /* Select GPIO LDN */ tmp = sio_read(port, 0xEF); @@ -380,7 +395,7 @@ static uint16_t it87spi_probe(uint16_t port) flashport |= sio_read(port, 0x65); msg_pdbg("Serial flash port 0x%04x\n", flashport); /* Non-default port requested? */ - param = extract_programmer_param("it87spiport"); + param = extract_programmer_param_str(cfg, "it87spiport"); if (param) { char *endptr = NULL; unsigned long forced_flashport; @@ -411,26 +426,22 @@ static uint16_t it87spi_probe(uint16_t port) free(param); exit_conf_mode_ite(port); - struct it8716f_spi_data *data = calloc(1, sizeof(struct it8716f_spi_data)); + struct it8716f_spi_data *data = calloc(1, sizeof(*data)); if (!data) { msg_perr("Unable to allocate space for extra SPI master data.\n"); return SPI_GENERIC_ERROR; } data->flashport = flashport; - data->fast_spi = 1; - spi_master_it87xx.data = data; - - register_shutdown(it8716f_shutdown, data); + data->fast_spi = true; if (internal_buses_supported & BUS_SPI) msg_pdbg("Overriding chipset SPI with IT87 SPI.\n"); /* FIXME: Add the SPI bus or replace the other buses with it? */ - register_spi_master(&spi_master_it87xx); - return 0; + return register_spi_master(&spi_master_it87xx, data); } -int init_superio_ite(void) +int init_superio_ite(const struct programmer_cfg *cfg) { int i; int ret = 0; @@ -440,26 +451,15 @@ int init_superio_ite(void) continue; switch (superios[i].model) { - case 0x8500: - case 0x8502: - case 0x8510: - case 0x8511: - case 0x8512: - /* FIXME: This should be enabled, but we need a check - * for laptop whitelisting due to the amount of things - * which can go wrong if the EC firmware does not - * implement the interface we want. - */ - //it85xx_spi_init(superios[i]); - break; case 0x8705: ret |= it8705f_write_enable(superios[i].port); break; + case 0x8686: case 0x8716: case 0x8718: case 0x8720: case 0x8728: - ret |= it87spi_probe(superios[i].port); + ret |= it87spi_probe(cfg, superios[i].port); break; default: msg_pdbg2("Super I/O ID 0x%04hx is not on the list of flash-capable controllers.\n", @@ -468,5 +468,3 @@ int init_superio_ite(void) } return ret; } - -#endif /* defined(__i386__) || defined(__x86_64__) */ |