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-rw-r--r--nic3com.c28
1 files changed, 12 insertions, 16 deletions
diff --git a/nic3com.c b/nic3com.c
index 6ff91e72f..d60b03cfb 100644
--- a/nic3com.c
+++ b/nic3com.c
@@ -54,9 +54,19 @@ const struct dev_entry nics_3com[] = {
};
static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
- chipaddr addr);
+ chipaddr addr)
+{
+ OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+ OUTB(val, io_base_addr + BIOS_ROM_DATA);
+}
+
static uint8_t nic3com_chip_readb(const struct flashctx *flash,
- const chipaddr addr);
+ const chipaddr addr)
+{
+ OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+ return INB(io_base_addr + BIOS_ROM_DATA);
+}
+
static const struct par_master par_master_nic3com = {
.chip_readb = nic3com_chip_readb,
.chip_readw = fallback_chip_readw,
@@ -125,20 +135,6 @@ int nic3com_init(void)
return 0;
}
-static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
- chipaddr addr)
-{
- OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
- OUTB(val, io_base_addr + BIOS_ROM_DATA);
-}
-
-static uint8_t nic3com_chip_readb(const struct flashctx *flash,
- const chipaddr addr)
-{
- OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
- return INB(io_base_addr + BIOS_ROM_DATA);
-}
-
#else
#error PCI port I/O access is not supported on this architecture yet.
#endif