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* Makefile: Remove a bashism when searching for sphinx-buildBart De Schuymer2023-08-291-1/+1
| | | | | | | | | | | | e.g. when the shell is dash and sphinx-build is not installed, HAS_SPHINXBUILD would be wrongly set to yes. Change-Id: I4d89e24ec3401446acec857eae134928bc3064d2 Signed-off-by: Bart De Schuymer <bdschuym@artinalgorithms.be> Reviewed-on: https://review.coreboot.org/c/flashrom/+/77288 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org> Reviewed-by: Jan Samek <jan.samek@siemens.com>
* Makefile: Simplify the NI-845X detectionThomas Heijligen2023-07-131-13/+3
| | | | | | | | | | | | | | | | | | | | | The current auto detection is kind of broken. Since the NI-845X driver package is likely not changing, hardcode `C:\Program Files (x86)\National Instuments\NI-845x\MS Visual C` as default path to search for the library and header. This can be overridden by setting `CONFIG_NI845X_LIBRARY_PATH` to the custom path. TEST=Run make HAS_LIB_NI845X=yes CONFIG_NI845X=yes successfully on MSYS2 MINGW32 Change-Id: I2115c30d0884e35eb549a31beef04d966ba4f491 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/75234 Reviewed-by: Alexander Goncharov <chat@joursoir.net> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Miklós Márton <martonmiklosqdev@gmail.com>
* Makefile: Fix DirtyJTAG buildJean THOMAS2023-06-191-1/+1
| | | | | | | | | | | | Fix typo where "FEATURE_FLAGS" is spelled "FEATURE_CFLAGS", preventing the DirtyJTAG driver from being used. Signed-off-by: Jean THOMAS <virgule@jeanthomas.me> Change-Id: I4b6bce24f34848d11731f4bc118a3052fb24e639 Reviewed-on: https://review.coreboot.org/c/flashrom/+/75891 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* Makefile: Build man-page only when sphinx is availableThomas Heijligen2023-05-101-7/+16
| | | | | | | | | | | | | | | | | Currently, it's not possible to compile the upstream branch using the `make' command without sphinx beeing installed. Check if sphinx-build is installed and only then build or install the man-page. The problem was noticed from commit f4f2f3dd19784efa26fd5619b7a44b4cdf14b04c move manpage to sphinx. Change-Id: If1b81d9bc25ecac19d493b44b00a7c42d0643fe6 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74519 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* makefile: remove gitconfig targetPeter Marheine2023-05-081-3/+0
| | | | | | | | | | | | | | There's basically no benefit to running `make` over directly running the script that configures hooks, and implementing similar support in Meson is difficult. Remove the Makefile target to achieve feature parity between the build systems. Ticket: https://ticket.coreboot.org/issues/486 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I278408bd515c5a5599b5c45c597cc66485a87082 Reviewed-on: https://review.coreboot.org/c/flashrom/+/74924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* meson make: use VERSION fileThomas Heijligen2023-05-071-9/+7
| | | | | | | | | | | | | | | | | | | | To create a distribution package with meson you run `meson dist -C <your_build_dir>` This will collect all git tracked files and pack them into an archive. There is no way to collect version information for that. So now the base version stands in the VERSION file. To relase a flashrom version you change that file and tag the changing commit. When building from git the git version is embedded in the flashrom binary. E.g.: flashrom 1.4.0-devel (git:v1.2-1172-g7f186838) on Linux 6.1.3 (x86_64) Change-Id: Idc17eadb397b3c579bddfbf9ae6bf1b171f5dfb7 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72657 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: Use printf instead of echo -nThomas Heijligen2023-05-061-1/+1
| | | | | | | | | | | On MacOS `echo -n` is not working. Change-Id: I96bb6c60e74133bbc86d5069cb076ee43f4bca83 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74522 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* libpci: drop support for pciutils < 2.2.0Thomas Heijligen2023-03-101-2/+0
| | | | | | | | | | | | | | This version was released in september 2005 and had a breaking api change. Drop it so that we don't need to maintain the old codepath any longer. Beside that, we have already a second codepath which is using the new `pci_get_dev` variant exclusively. Change-Id: If943db350b561a005d8292a53d9255223db3d571 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* move manpage to sphinxThomas Heijligen2023-03-011-14/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Use sphinx (sphinx-doc.org) to generate the UNIX man page from an reStructuredText file instead of dealing with plain groff. Use `meson setup -Dman-pages=enabled` to build the man page, and `meson setup -Ddocumentation=enabled` to build the web documentation explicitly. Both are enabled automatically if sphinx-build is found. The man page will be installed as `<meson_mandir>/man8/flashrom.8` and The html documentation in <meson_datadir>/doc/flashrom/html`. The Makefile builds only the man-page format. Increase the minimum version of meson from 0.53.0 to 0.57.0 to be able to pass environment variables to the custom_target() command. That is needed to pass the FLASHROM_VERSION to the documentation. Change-Id: Iee9f1164c5913e47385e6f7d51dc7775a58b5a67 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72619 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Alexander Goncharov <chat@joursoir.net>
* ch347_spi: Add initial support for the WCH CH347Nicholas Chin2023-02-271-0/+9
| | | | | | | | | | | | | | | | | | | | | | | Add support for the WCH CH347, a high-speed USB to bus converter supporting multiple protocols interfaces including SPI. Currently only mode 1 (vendor defined communication interface) is supported, mode 2 (USB HID communication interface) support will be added later. The code is currently hard coded to use CS1 and a SPI clock of 15 MHz, though there are 2 CS lines and 6 other GPIO lines available, as well as a configurable clock divisor for up to 60MHz operation. Support for these will be exposed through programmer parameters in later commits. This currently uses the synchronous libusb API. Performance seems to be alright so far, if it becomes an issue I may switch to the asynchronous API. Tested with a MX25L1606E flash chip Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Change-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba Reviewed-on: https://review.coreboot.org/c/flashrom/+/70573 Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* asm106x: add programmer for ASM106x SATA controllersAlex Badea2023-02-271-0/+10
| | | | | | | | | | | | | | | | | | | | The ASMedia ASM106x series is a PCIe-SATA controller chip. It supports an attached SPI flash chip that can contain configuration and PCI option ROM. The interface is a simple shifter accessed via PCI config space, up to 4 bytes at a time. Add a programmer driver for it. Tested on a G536PCE1061V11 IO-PCE1061-V1.1 PCIe card, and a MPCE2ST-A01 VER006S mini-PCIe card, both with chips marked ASM1061, both enumerate as: 01:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02) (prog-if 01 [AHCI 1.0]) Subsystem: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:1060] Change-Id: I591b117be911bdb8249247c20530c1cf70f6e70d Signed-off-by: Alex Badea <vamposdecampos@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* jedec.c: Move printlock stuff into printlock.cEdward O'Callaghan2023-02-211-1/+1
| | | | | | | | | Change-Id: Iacaa16c81e141aac30feb6871700c4fdc9eec8e9 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72607 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* serial: Add Darwin/macOS support for custom and >230400 baudratesPeter Stuge2023-02-161-0/+4
| | | | | | | | | | | This change is based on the patch proposed by Denis Ahrens in https://review.coreboot.org/c/flashrom/+/67822 Change-Id: I3e6b88d2b4c2a130b16456752681fd9f807bf6f0 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* internal: Move parallel logic into internal_par implementationEdward O'Callaghan2023-02-151-2/+2
| | | | | | | | | | | | | The parallel internal programmer is its own implementation. Move it and call into it from the top-level internal.c programmer implementation. Change-Id: Idabeceb59a36680f5fbb45d3ee4bd5dbf837373b Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71834 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashrom.c: Add functions for new erase selection algorithmAarya Chaumal2023-02-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | 1) Add function to flatten out the addresses of the flash chip as per the different erase functions. This function will return a list of layouts which is dynamically allocated. So after use all the layouts as well as the list itself should be freed. The free_erase_layout function does that. 2) Add function to align start and end address of the region (in struct walk_info) to some erase sector boundaries and modify the region start and end addresses to match nearest erase sector boundaries. This function will be used in the new algorithm for erase function selection. 3) Add function that returns a list of sectors (as seen by the first erase function) that need erasing. 4) Add a function to call the erase algorithm. Change-Id: Ic57ca1cca3d1646543f6b5939ba9c35db8d08256 Signed-off-by: Aarya Chaumal <aarya.chaumal@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/65844 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* internal.c: Move sio register to own objectEdward O'Callaghan2023-02-041-1/+1
| | | | | | | | | | | | | | While super i/o is related to the internal programmer it isn't actually _the_ internal programmer. Move register logic to its own object consistent with other programmer types. Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71577 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util: add bash completion scriptAlexander Goncharov2023-01-181-2/+49
| | | | | | | | | | | | | | | | | | | | | | | | Add a bash script for the flashrom CLI that auto-completes the command sequence. The script is generated from a template by substituting a list of enabled programmers. It requires an extra `bash-completion` package to work, but, fortunately, it's installed on most systems. Build system changes: meson: provide option `bash_completion` to determine if the script should be installed (depends on option `classic_cli`). makefile: make a list of enabled programmers (by using CONFIG_* variables) to do substitution manually Change-Id: Ie68bc91c3cea4de2ffdbeffd07e48edd8d5590e1 Signed-off-by: Alexander Goncharov <chat@joursoir.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/68247 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* Makefile: Don't install git hooks automaticallyFelix Singer2022-11-041-3/+3
| | | | | | | | | | | | | | | | | | These specific git hooks are only needed when someone wants to push a patch to upstream and so it's not needed to run it in every make call. Beside that, we also don't know the environment in which this is executed and it might not be wanted. Thus, add a new make target `gitconfig` and move the install command to it. It can be used by running `make gitconfig`. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: Ib83568c7ff149a8ec34ad7e92720c36a89def7bd Reviewed-on: https://review.coreboot.org/c/flashrom/+/68647 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* dirtyjtag: Add DirtyJTAG programmerJean THOMAS2022-10-151-0/+9
| | | | | | | | | | | | | | | | Add a new programmer driver for the DirtyJTAG project (a USB-JTAG firmware for STM32 MCUs). Successfully tested with DirtyJTAG 1.4 running on an Olimex STM32-H103 development board and a SST25VF020B SPI flash chip. Change-Id: Ic43e9a014ed7d04e429e73b30c9dcfdde1a78913 Signed-off-by: Jean THOMAS <virgule@jeanthomas.me> Reviewed-on: https://review.coreboot.org/c/flashrom/+/67878 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* print.c: Move list of known boards to known_boards.cEdward O'Callaghan2022-08-291-2/+2
| | | | | | | | | | | | | This free's up namespace pollution and a layer of ifdef. BUG=b:242246291 TEST=builds Change-Id: Id098343b9b79fd9b01c7dc48e64756ad350f9d83 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* parallel.c: Consoldiate parallel master registration logicEdward O'Callaghan2022-08-251-1/+1
| | | | | | | | | | | | | | | | This is analogous to spi.c and opaque.c however parallel logic was previously never consoldiated. This free's up flashrom.c from namespace pollution. BUG=b:242246291 TEST=builds with both make and meson. Change-Id: Ie08e2e6c51ccef5281386bf7e3df439b91573974 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* flashrom.c: Move read_buf_from_file() to helpers_fileio.cEdward O'Callaghan2022-08-251-1/+1
| | | | | | | | | | | | | | | | | | Constructing a buffer from a read file is auxiliary functionality to the core flashrom algorithms. Move aside to decrease the overall complexity of flashrom.c BUG=b:242246291 TEST=builds Change-Id: Ia6e1eeb876722899defb5b75346d1f22c70bfbd1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66645 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Evan Benn <evanbenn@google.com> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Thomas Heijligen <src@posteo.de>
* Makefile: print dependency versionsThomas Heijligen2022-08-231-4/+8
| | | | | | | | | | When a library is found, then print its version in the config target. Change-Id: Ie1ff8107311247fba9e5caa252d559447c871867 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66695 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* Makefile: Fix build for WindowsThomas Heijligen2022-08-121-0/+3
| | | | | | | | | | | | | | | Mark programmers requiring RAW_MEM_ACCESS, X86_IO_PORT and X86_MSR as unsupported on Windows TEST=Buils on Cygwin (Windows 11, amd64, gcc 11.3.0) Change-Id: If70691a9eae40c394a06d11349bedefa40586f4a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66546 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: Add support for Elbrus (e2k) architectureAnton Samsonov2022-08-091-1/+1
| | | | | | | | Signed-off-by: Anton Samsonov <devel@zxlab.ru> Change-Id: Ifc834e943ae93c59447afc86454b22ca662d3ef6 Reviewed-on: https://review.coreboot.org/c/flashrom/+/66426 Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: fix rebuild issuesThomas Heijligen2022-08-091-2/+2
| | | | | | | | | | | | | | | | | Flashrom does no longer rebuild everything if `make` is executed. Now the rule config will run, if needed, before any ‘.o’ is built, but no ‘.o’ will be built because there is no config file. https://www.gnu.org/software/make/manual/make.html#Prerequisite-Types Change-Id: Ie9225b79c0eb27cb041654d703cde5efc769cbf2 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66130 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Fix dependencies for developerbox_spiFelix Singer2022-07-251-0/+1
| | | | | | | | | | | | The developerbox_spi programmer depends on bitbang SPI support. Thus, fix that. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: Ic0fe589ffdccede0fbf6360c2bebe58a36654f10 Reviewed-on: https://review.coreboot.org/c/flashrom/+/66096 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Thomas Heijligen <src@posteo.de>
* Makefile: Fix option name of parade_lspcon programmerFelix Singer2022-07-251-1/+1
| | | | | | | | | | | | Commit df0bbf0 renamed the programmer lspcon_i2c_spi to parade_lspcon but also introduced a typo in its Makefile config option. Fix that. Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: Ie9193931a4483bba129da513554ce7ca0b790374 Reviewed-on: https://review.coreboot.org/c/flashrom/+/66095 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Thomas Heijligen <src@posteo.de>
* Rename lspcon_i2c_spi to parade_lspconThomas Heijligen2022-07-171-6/+6
| | | | | | | | | | | | | | | | | | | | | The chip targeted by the `lspcon_i2c_spi` programmer is a Parade PS175. Rename the programmer to match the chips vendor / family instead of the generic LSPCON protocol. Remove the `_i2c_spi` ending in preparation to become an opaque master. The chip is visible on an Acer Chromebox CXI4. https://www.paradetech.com/products/ps175/ https://www.acer.com/ac/en/US/content/series/acerchromeboxcxi4 TEST: `make CONFIG_PARADE_LSPCON=yes` and `meson build -Dconfig_parade_lspcon=true` produces flashrom binaries with the parade_lspcon programmer included. Change-Id: I9148be6d9162c1722ff739929ca5e181b628dd57 Signed-off-by: Thomas Heijligen <src@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/65547 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* it85spi: EOL supportEdward O'Callaghan2022-07-041-1/+1
| | | | | | | | | | | | | | | | | | | | | This code was originally introduced by ITE for now exceedingly old Chromebooks. The code has had very little attention to maintain it, unlikely tested for a long time and now seems to be just a technical burden to the flashrom project. If someone is later interested it could be resurrected for reference from git history. However, it needs quite a bit of work to bring it back into maintainable order. BUG=b:156143896,b:170689483 TEST=tree builds under meson+make and unit tests pass. Change-Id: I5e8cafd73db837941c518f0e2d72d8192274fd79 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/65378 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Global cleanup: Fix a few spelling errorsMartin Roth2022-05-031-1/+1
| | | | | | | | | | | | | | | | Just a trivial patch to fix a few errors found by codespell. Here's the command I used: codespell -S subprojects,out \ -L fwe,dout,tast,crate,parms,claus,nt,nd,te,truns,trun Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I4e3b277f220fa70dcab21912c30f1d26d9bd8749 Reviewed-on: https://review.coreboot.org/c/flashrom/+/62840 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: Align BITBANG_SPI with the other DEPENDS_ and USE_ configsThomas Heijligen2022-04-291-13/+5
| | | | | | | | | | Drop not needed `-DCONFIG_BITBANG_SPI=1` Change-Id: I2a519c929f7747af70568284823b51678751e285 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/63886 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Introduce an `include` directory for header filesThomas Heijligen2022-04-291-2/+4
| | | | | | | | | | | | Move all header files to the new `include` directory. Adapt include directives and build systems to the new directory. Change-Id: Iaddd6bbfa0624b166d422f665877f096983bf4cf Signed-off-by: Felix Singer <felix.singer@secunet.com> Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58622 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* Drop STANDALONE modeThomas Heijligen2022-04-131-1/+0
| | | | | | | | | | | | | | | | STANDALONE mode was used to build flashrom without having support for file handling. This was relevant to build libflashrom on top of libpayload. For a while now, the code which is covered by STANDALONE has moved to cli_*.c and is not used for libflashrom. Therefore we can drop STANDALONE mode. Change-Id: I58fb82270a9884a323d9850176708d230fdc5165 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/63469 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* NEED_PCI: remove macroThomas Heijligen2022-04-131-1/+0
| | | | | | | | | | The NEED_PCI macro is only used to guard prototypes. This is not needed. Change-Id: I6895b795bc96b3e251700bff4b0054407aac789a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62834 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: add endianness converting deserialization functionsThomas Heijligen2022-04-131-1/+1
| | | | | | | | | | | | | | | Add functions like `uint32_t read_le32(const void *base, size_t offset);` Read a 32 bit unsigned from a base with an offset. Having prototypes and a macro generated implementation makes it easier to read, understand and spot errors in one of them. Change-Id: Idde177acf8bc5f94cd046b6539dc31532c98e452 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/31016 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Endian conversion: move to platform.h and platform/endian*.cThomas Heijligen2022-04-121-2/+3
| | | | | | | | | | | Starting to move the platform dependent code to platform/ and provide the abstraction through the platform.h header. Change-Id: I35640282d451960f2a329ae24339ec05dbae6d30 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62899 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: replace macros by C codeThomas Heijligen2022-04-121-1/+3
| | | | | | | | | | | | | | Split the code for endian conversion into separate files for big and little endian. The buildsystem selects the correct file for the used endianness. Replace the swab macros with `static inline` c functions. Define macros for returning the same or swapped value. Call those macros in the endian specific files. Change-Id: I86d38d816b37c283279c485fac8027f8fb94364a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62898 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess_x86_io: clean header conceptThomas Heijligen2022-03-141-19/+0
| | | | | | | | | | | | | Move all function implementations into the .c file TEST: `[g]make [WARNERROR=no]` on Linux, FreeBSD, NetBSD, OpenBSD, DragonflyBSD, OpenIndiana, Debian-GNU/Hurd Change-Id: I1400704e9ac5fed00c096796536108d5bfb875e3 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61276 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: use HAS_ USE_ pattern for serial supportThomas Heijligen2022-03-141-10/+12
| | | | | | | | | | | Align the usage of serial function with the selection of other dependencies. Change-Id: Ica951e76d6362b01f09d23a729a2a6049e7f0b66 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: print version info as part of the config targetThomas Heijligen2022-03-121-3/+1
| | | | | | | | | Change-Id: I1a846acfd8d2e0a9fc8b02c078b6ac0342438490 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62199 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: use libflashrom.a as input to build the flashrom executableThomas Heijligen2022-03-121-5/+5
| | | | | | | | | Change-Id: Ib0091a23611cd5a1d915e56c6d0f061d74198e88 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: add CONFIG_MEDIATEK_I2C_SPI to DEPENDS_ON_LINUX_I2CThomas Heijligen2022-03-121-0/+1
| | | | | | | | | | | The Mediatek i2c spi driver requires the linux i2c stack. Change-Id: Ic90048c549fecb8c051750a92c5b35403f07fbf4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62217 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: use the HAS_ USE_ scheme for linux i2c dependent programmerThomas Heijligen2022-03-121-2/+7
| | | | | | | | | | Change-Id: I47acdf89a369441b9fc664352c27c43b461545b1 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62197 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* flashchips,writeprotect_ranges: add range decoding functionNikolai Artemiev2022-03-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow chips to specify functions that map status register bits to protection ranges. These are used to enumerate available ranges and determine the protection state of chips. The patch also adds a range decoding function for the example chips. Many other chips can also be handled by it, though some will require different functions (e.g. MX25L6406 and related chips). Another approach that has been tried in cros flashrom is maintaining tables of range data, but it quickly becomes error prone and hard to validate. Using a function to interpret the ranges allows compact encoding with most chips and is flexible enough to allow chips with less predictable ranges to be handled as well. BUG=b:195381327,b:153800563 BRANCH=none TEST=dumped range tables, checked against datasheets Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* Makefile: Rework the EXEC_SUFFIX determinationThomas Heijligen2022-02-231-2/+1
| | | | | | | | | | | | | Use a conditional function for the statement. This limits the decision to one line instead of multiple places. Change-Id: Iee66dbc609bd5c6eb9d04b457f4508911b2e6560 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62195 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* Makefile: enable internal programmer for x86 and all linux platformsThomas Heijligen2022-02-211-12/+20
| | | | | | | | | | | | | | The internal programmer has platform independent code for x86 and linux based code for mipsel. Furthermore the internal programmer can call the linux mtd programmer when available. Enable the internal programmer on x86 or linux. Change-Id: Ia607ea60c3d7d15fe231fa412595992dadc535ad Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: remove CPPFLAGS and LDFLAGS to default directoriesThomas Heijligen2022-02-161-15/+0
| | | | | | | | | | All CPPFLAGS and LDFLAGS for dependencies are handled by pkg-config Change-Id: Ib7c11a0c8a7918562256480c4be0c95355f981c5 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61526 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: use pkg-config --libs --static for LDFLAGSThomas Heijligen2022-02-151-1/+0
| | | | | | | | | | | | | | The --static flag of pkg-config returns also the LDFLAGS which are required to link the library static. Use this flag to successfully link against static libraries when the shared variant is not available. This is the case in OpenBSD with libpci. Change-Id: I6029a096c1ceca625789d18c88119d912d79bc0e Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61524 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: check if librt is an external libraryThomas Heijligen2022-02-151-0/+4
| | | | | | | | | | | | Some systems, e.g. OpenBSD, have clock_gettime / librt build into the libc and therefore fail to link against it with -lrt. Thus, detect this and link only if needed. Change-Id: I2c1668a350aa0806fccfb4e9cd8b04861f085ee9 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61523 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-04 20:11:56 +0000