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* flashchips.c: ATMEL->Atmel for consistencyAlan Green2019-07-021-1/+1
| | | | | | | | | | | | Replace the single instance where a vendor name was spelled inconsistently. Signed-off-by: Alan Green <avg@google.com> Change-Id: I6478bc29f640f789f3b35e7b4816133f4a0d292e Reviewed-on: https://review.coreboot.org/c/flashrom/+/33829 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashchips.c: Make whitespace consistentAlan Green2019-07-021-98/+101
| | | | | | | | | | | | | | | For consistency, and to make the file amenable to manipulation by tools, use only tabs when indenting. Some previous changes had introduced spaces for indenting. Also ensure that every table entry is separated by a single blank line. Signed-off-by: Alan Green <avg@google.com> Change-Id: Ib2193798cc52641d6c443f8851903c749b31cb74 Reviewed-on: https://review.coreboot.org/c/flashrom/+/33828 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add support for MX25U25635FDavid Tomaschik2019-06-281-0/+49
| | | | | | | | | | | This is a 256Kb part with support for JEDEC 4 byte addressing modes. Tested successfully for probe/read. Change-Id: I5bdcd32acd1942edf65e50bce0f81c836095ee8c Signed-off-by: David Tomaschik <davidtomaschik@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add Sanyo LE25FU206/A and LE25FU106BAngel Pons2018-11-011-0/+100
| | | | | | | | | | | As per user `The_Raven Raven` on the mailing list. Since the added values had some inconsistencies, the chips are marked as untested. Change-Id: I6c26aafdca232110986334e85297d73d513600dc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28813 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add IS25LP256 and IS25WP256David Hendricks2018-10-301-0/+100
| | | | | | | | | | | Tested IS25LP256 using Raspberry Pi and Dediprog SF600 programmers. Tested IS25WP256 using Dediprog SF600. Change-Id: Idf7a224abcde5f7935d9ef88309f78207de60a7a Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/29306 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add W25Q256JV supportDavid Hendricks2018-10-291-0/+47
| | | | | | | | | | | | | | Similar to W25Q256FV, but it supports the native 4BA page program instruction (12h). Note that the variant with QE enabled by default shares the device ID of the W25Q256FV. Tested using a Raspberry Pi. Change-Id: I76d7362777d364594d2a733d7e478741b0bef7c4 Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/29305 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark MX25L25635F as testedKasper Revsbech2018-10-231-1/+1
| | | | | | | | | | As reported by Kasper Revsbech on 2018-10-19. Change-Id: Icf05288c4e7e34af2e3f4b951457df695078847d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/29202 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add Macronix MX25U8032EAngel Pons2018-10-071-0/+40
| | | | | | | | | | As per `The_Raven Raven` on the mailing list. Change-Id: I422c3d51e5011e081ff6bccff294817c8c1765d0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28821 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add W25Q128.V..WPatrick Rudolph2018-10-051-0/+37
| | | | | | | | | | | Port the code from chromeos flashrom. Tested using W25Q128JVSIM in SPI mode. Change-Id: I38397a0c831407afa21cddca8485664576fce92c Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28910 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark S25FL208K as testedNico Huber2018-10-041-1/+1
| | | | | | | | | | As report by Frédéric Germain on 2017-12-17. Change-Id: I0a7fc10e75f4a675de41e9765525defe2d2640e4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28883 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashchips: Add ISSI IS25WP064 and IS25WP032Nico Huber2018-10-041-1/+86
| | | | | | | | | | | | The IS25WP064 was tested successfully by Simon Buhrow as reported on 2018-9-4. While we are at it, also add the 32Mbit version which shares the datasheet (as does the already supported 128Mbit version). Change-Id: Ie0887b4ae6e6465118a5dc2e20b784f783d161b8 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashchips: Add ATMEL AT25SL128AHal Martin2018-10-031-0/+39
| | | | | | | | | Change-Id: I60c433ffe9e34663c2cfc608b8b76943cd92a8ba Signed-off-by: Hal Martin <hal.martin@gmail.com> Reviewed-on: https://review.coreboot.org/26576 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Enable native 4BA instructions for Spansion 25FL256SNico Huber2018-10-031-1/+4
| | | | | | | | | Change-Id: I0ffc816ca714ecce5b89b1eaadb5e73ccb38d9ab Signed-off-by: Nico Huber <nico.h@gmx.de> Tested-by: Michael Fuckner <michael@fuckner.net> Reviewed-on: https://review.coreboot.org/25134 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* Enable 4BA mode for Spansion 25FL256SNico Huber2018-10-031-1/+1
| | | | | | | | | | | 4BA mode is entered by setting bit 7 for the extended address register. Change-Id: I807bf55d65763a9f48a6a3377f14f4e5288a7a4c Signed-off-by: Nico Huber <nico.h@gmx.de> Tested-by: Michael Fuckner <michael@fuckner.net> Reviewed-on: https://review.coreboot.org/25133 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* flashchips: Add Spansion 25FL256S......0Nico Huber2018-10-031-0/+42
| | | | | | | | | | | | | | | | The Spansion 25SFL256S supports 4BA through an extended address register, a 4BA mode set by bit 7 of that register, or native 4BA instructions. Enable the former only for now. Unfortunately the S25SF256S uses another instruction to write the exten- ded address register. So we add an override for the instruction byte. Change-Id: I0a95a81dfe86434f049215ebd8477392391b9efc Signed-off-by: Nico Huber <nico.h@gmx.de> Tested-by: Michael Fuckner <michael@fuckner.net> Reviewed-on: https://review.coreboot.org/25132 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* flashchips: Mark Spansion S25FL128P......0 as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | Tested with a Spansion FL128PIF. Change-Id: Ic99eabb67d5bce3910e9275d0056a7cfa8cff36f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28866 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Atmel AT45DB081D as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per `The_Raven Raven` on the mailing list. Change-Id: I225984b9e2589713f25d0f9b49eb1c3abdcff3cd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28825 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Winbond W25Q40BW as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | | | | As per `The_Raven Raven` on the mailing list. The tested chip was `W25Q40.W`, but it was later renamed to `W25Q40BW` when the `W25Q40EW` was added. Change-Id: I624adef2c5b4dd83f0ce93d6069e315fc407db19 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark PMC Pm25LD040 as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per `The_Raven Raven` on the mailing list. Change-Id: Ied8d07c54f8a222dbe05503f859f82bba27d8336 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Sanyo LE25FU406C as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per `The_Raven Raven` on the mailing list. Change-Id: I1dba38d03c826a53bff3ddad0aa536032c5532a1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28822 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark PMC Pm25LD020 as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per `The_Raven Raven` on the mailing list. Change-Id: I16d5a207599b434fe52b42709e42f1f32a8e6698 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28820 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark GigaDevice GD25Q128C as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per Tomasz Walach on the mailing list. Change-Id: Ib0d7485c7221f92ec13995c58065a48e08f57cd8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28819 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark AMIC A25L40PU as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per Stefan Szwarnowski on the mailing list. Change-Id: I574094bdb83611a3cda2fcc455bcf9aed3774011 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28818 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Winbond W25Q256.V as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per Richard Hughes via the mailing list. Change-Id: Ic562a65d1a7d394f9d2c3980833d10a87bd9358a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28816 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Macronix MX66L51235 as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per Nick (cel366) on 2018-05-16 via mailing list. Change-Id: I44363e6755167adbc120444a481b09bb4e1063c5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28815 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Atmel AT25DF161 as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As per Konstantin on 2018-06-08 via mailing list. Change-Id: I75fb4b17cf330451489811ae9303cbb33ebcb183 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28814 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Macronix MX25U12835F as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | | | | As reported by David Martinka on the mailing list. Erase has not been tested, but since writes are reported as working, it is very likely erase works as well. Change-Id: I172453fe902ccface2a3a85817d775d45dd7cf80 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28812 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Eon EN25S40 as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As reported by `The_Raven Raven` on the mailing list. Change-Id: I00f9c6fcf13c486765d0ac4fe06a8b0989b03f91 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark GigaDevice GD25B128B/GD25Q128B as testedAngel Pons2018-10-031-2/+2
| | | | | | | | | | | | Alexander reported this chip as tested using a GD25B128CPIG (same device ID, apparently) on 2018-08-30 via the mailing list. The chip name is updated as well. Change-Id: I134d3816c0f02e20764ab132a01bcba9f4e93f0d Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add ISSI IS25LP064Angel Pons2018-10-031-0/+41
| | | | | | | | | | | Grabbed from mailing list, created by Simon Buhrow. Since no logs were attached, the chip is marked as untested. Change-Id: Idc26162fc5a5a429acef546b30b12d8b1f195e0a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28809 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark Micron MT25QL512 as testedAngel Pons2018-10-031-1/+1
| | | | | | | | | | As reported by `Yuta Teshima` on the mailing list. Change-Id: I7325d42b43b71ab5fc2c7618e0577e4a7b31f01a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28808 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Fix typosElyes HAOUAS2018-08-191-3/+3
| | | | | | | | Change-Id: I20745d5f30f9577622e27abf2f45220f026f65ac Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Mark GigaDevice GD25Q512 as testedNico Huber2018-08-191-1/+1
| | | | | | | | | | As reported by `nvflash` on IRC. Change-Id: Id3928e3790ddac34645959535e646d552ce5328e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at>
* Add support for MX25R6435FNathan Rennie-Waldock2018-08-171-0/+39
| | | | | | | | | Change-Id: I664ffce6f9aa7544e17b516a1b4179d561208b2f Signed-off-by: Nathan Rennie-Waldock <nathan.renniewaldock@gmail.com> Reviewed-on: https://review.coreboot.org/28004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add Macronix MX25U51245GDaniel Thompson2018-08-171-0/+49
| | | | | | | | | | | | | | | | Copy 'n paste support for Macronix MX25U51245G. I don't pretend to know a whole lot about SPI FLASH so its mostly copied from other MX25U devices and double checked a few bits and pieces against the datasheet. I have tested basic probe, read, erase and write using layout files. I tested both with 4MB@0x0000000 and 64K0@0x3f00000 (the later means I have tested 4-byte addressing). Change-Id: I2117fc205006088967f3d97644375d10db1791f1 Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Reviewed-on: https://review.coreboot.org/26949 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Add support for AT25DF021ASteffen Mauch2018-06-061-0/+39
| | | | | | | | | | | This is the low-voltage version of the AT25DF021. Tested with FT2232H Mini Module Change-Id: If4990e6856c8b77567ef4218459cf754b9c6bc57 Signed-off-by: Steffen Mauch <steffen.mauch@gmail.com> Reviewed-on: https://review.coreboot.org/26856 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add support for the AT25SF081Evan Jensen2018-06-041-0/+38
| | | | | | | | Change-Id: I1a3d900462ad9e7a3b34575d7c98acc7c2df0445 Signed-off-by: Evan Jensen <evan.p.jensen@gmail.com> Reviewed-on: https://review.coreboot.org/26779 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* flashchips: Add Winbond 25Q40EW and rename 25Q40.WNico Huber2018-05-061-2/+42
| | | | | | | | | | | Same story as for 25Q80BW/EW, 25Q40EW has a new ID and the only known chip with the old ID is the BW variant. Change-Id: Ib610b0d6f3a5561b2ac3505ef15bdee8b0edae25 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/25462 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)Wei Hu2018-05-061-0/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch seems to have originally been from https://patchwork.coreboot.org/patch/4126/ . The most recent version seems to be in OpenEmbedded (commit 503a572) which added support for 16Mbit and 32Mbit variants. The OpenEmbedded patch also makes changes to linux_spi.c to add some debug prints which are omitted in this version. From the original commit message: Differences between SST26 and SST25: 1. The WREN instruction must be executed prior to WRSR [Section 5.31]. There is no EWSR. 2. Block protection bits are no longer in the status register. There is a dedicated 144-bit register [Table 5-6]. The device is write-protected by default. A Global Block-Protection Unlock command unlocks the entire memory [Section 4.1]. Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219 Signed-off-by: Wei Hu <wei@aristanetworks.com> Signed-off-by: David Hendricks <david.hendricks@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Reviewed-on: https://review.coreboot.org/25962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Remove address from GPLv2 headersElyes HAOUAS2018-04-241-4/+0
| | | | | | | | Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Fix whitespace errorsElyes HAOUAS2018-04-241-2/+2
| | | | | | | | Change-Id: Ic2d3bb9d8581a0471a8568a130f893b34dddf113 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: W25Q80.W --> W25Q80BWDavid Hendricks2018-03-281-2/+2
| | | | | | | | | | | | | | The W25Q80BW appears to have been succeeded by the W25Q80EW which has a different manufacturer ID but is otherwise similar. Consequently, W25Q80.W no longer matches all chips in this family. This patch makes the original entry specific to W25Q80BW. Change-Id: I2980272c2691eb62a68056a7a4c308e9b4810347 Signed-off-by: David Hendricks <dhendricks@fb.com> Reviewed-on: https://review.coreboot.org/25100 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Add support for Atmel/Adesto AT25SF161 and Winbond W25Q80EWStanislav Sedov2018-03-281-0/+76
| | | | | | | | Change-Id: Ia9e8f7f23896f7002401c6b1e616c0dc102198e2 Signed-off-by: Stanislav Sedov <ssedov@fb.com> Reviewed-on: https://review.coreboot.org/25099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* Add support for Atmel / Adesto AT25SF041 SPI flash chipjvm2018-03-141-0/+38
| | | | | | | | | | | probe/erase/read/write/verify hardware-tests were done. Change-Id: I0be930ff2258300508398e12fbe5abe10400fea2 Signed-off-by: Julian von Mendel <git@jinvent.de> Signed-off-by: jvm <git@jinvent.de> Reviewed-on: https://review.coreboot.org/25047 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add ZD25D20David Hendricks2018-02-221-0/+38
| | | | | | | | | This adds another Zetta Device chip, the ZD25D20. Change-Id: Idf805252647be44e28296a161d2e6160710bcc71 Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/23702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashchips: Add Zettadevice ZD25D40nybash2018-02-211-1/+39
| | | | | | | | | | | | This introduces the Zettadevice manufacturer ID and adds support for the ZD25D40 chip. Based on PR20 from Github. Change-Id: I0400b059ddacdf166d1b77f619becec3a250cece Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/23701 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add Winbond W25P80/16/32 supportDavid Hendricks2018-02-201-0/+86
| | | | | | | | | | | This adds support for W25P80/16/32 chips. Most notably these chips only have two erase commands - one for 64KiB "sectors" and one for chip erase. Change-Id: Ie09ba8e28fee35c42e17ca05219dc673413de93b Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/23700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add support for the ENE Embedded Debug Interface EDI and KB9012 ECPaul Kocialkowski2018-02-111-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | The ENE Embedded Debug Interface (EDI) is a SPI-based interface for accessing the memory of ENE embedded controllers. The ENE KB9012 EC is an embedded controller found on various laptops such as the Lenovo G505s. It features a 8051 microcontroller and has 128 KiB of internal storage for program data. EDI can be accessed on the KB9012 through pins 59-62 (CS-CLK-MOSI-MISO) when flash direct access is not in use. Some firmwares disable EDI at runtime so it might be necessary to ground pin 42 to reset the 8051 microcontroller before accessing the KB9012 via EDI. The example of flashing KB9012 at Lenovo G505S laptop could be found here: http://dangerousprototypes.com/docs/Flashing_KB9012_with_Bus_Pirate Change-Id: Ib8b2eb2feeef5c337d725d15ebf994a299897854 Signed-off-by: Mike Banon <mikebdp2@gmail.com> Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/23259 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Revise all 4BA chipsNico Huber2018-01-021-13/+42
| | | | | | | | | | | | | | | | Advertise all 4BA features that are currently supported by flashrom, plus add a new feature flag for the 4BA fast-read instruction. Also, list all supported 3BA and 4BA erase-block functions. As this adds a lot of new code paths that could be taken for these chips, mark them all as untested again. Change-Id: I0598496ee7058e3b170684d366f58e4014e0e871 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22423 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* spi25: Revise decision when to enter/exit 4BA modeNico Huber2018-01-021-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of arbitrarily deciding whether to enter 4BA mode in the flash chip's declaration, advertise that entering 4BA mode is supported and only enter it if the SPI master supports 4-byte addresses. If not, exit 4BA mode (the chip might be in 4BA mode after reset). If we can't assure the state of 4BA mode, we bail out to simplify the code (we'd have to ensure that we don't run any instructions that can usually be switched to 4BA mode otherwise). Two new feature flags are introduced: * FEATURE_4BA_ENTER: Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN. * FEATURE_4BA_ENTER_WREN Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN. FEATURE_4BA_SUPPORT is dropped, it's completely implicit now. Also, draw the with/without WREN distinction into the enter/exit functions to reduce code redundancy. Change-Id: I877fe817f801fc54bd0ee2ce4e3ead324cbb3673 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22422 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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