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* programmer.h: Convert anon union to anon structEdward O'Callaghan2021-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Convert the anon union of registered masters in the mst field of the flashctx to a anon struct. If we are going to dereference a pointer there in an undefined way we should crash and not plow ahead with invalid memory. The user of the registered_masters type is therefore responsible for querying the buses_supported field before attempting to dereference a ptr field in the anon struct. BUG=b:175849641 TEST=`flashrom -p internal --flash-name` Change-Id: I576967a8599b923c902e39f177f39146291cc242 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/50246 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Daniel Campello <campello@chromium.org> Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* const'ify flashctx to align signatures with cros flashromEdward O'Callaghan2020-04-301-4/+4
| | | | | | | | | | | | | | | | The ChromiumOS flashrom fork has since const'ify flashctx in a few places. This aligns the function signatures to match with downstream to ease forward porting patches out of downstream back into mainline flashrom. This patch is minimum viable alignment and so feedback is welcome. Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* spi: Move 16MiB partitioning up into spi_chip_read()Nico Huber2019-06-211-1/+13
| | | | | | | | | | | | | We enforced a 16MiB limit in spi_read_chunked() for multi-die flash chips that can't be fully read at once. The same limit can be useful for dediprog programmers. So move it into a more generic place. Change-Id: Iab1fd5b2ea550b4b3ef3e8402e0b6ca218485a51 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33613 Reviewed-by: Ryan O'Leary Reviewed-by: ron minnich <rminnich@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* Remove address from GPLv2 headersElyes HAOUAS2018-04-241-4/+0
| | | | | | | | Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* spi: Move ICH BBAR quirk out of the wayNico Huber2017-12-281-46/+1
| | | | | | | | | | | | | | | | | | | | | Get rid of the layering violations around ICH's BBAR. Move all the weird address handling into (surprise, surprise) `ichspi.c`. Might fix writes for the `BBAR != 0` case by accident. Background: Some ICHs have a BBAR (BIOS Base Address Configuration Register) that, if set, limits the valid address range to [BBAR, 2^24). Current code lifted addresses for REMS, RES and READ operations by BBAR, now we do it for all addresses in ichspi. Special care has to be taken if the BBAR is not aligned by the flash chip's size. In this case, the lower part of the chip (from BBAR aligned down, up to BBAR) is inacces- sible (this seems to be the original intend behind BBAR) and has to be left out in the address offset calculation. Change-Id: Icbac513c5339e8aff624870252133284ef85ab73 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22396 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* 4BA: Flashrom integration for the 4-bytes addressing extensionsBoris Baykov2017-10-151-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch integrates code of the previous patch into Flashrom's code. All the integrations is around 3 functions spi_nbyte_read, spi_nbyte_program and spi_byte_program. After this patch then are not static and can be called by their pointers saved in flashchips array. Also I added to flashrom.c some code to switch a chip to 4-bytes addressing mode. And one error message is corrected in spi.c because it's not suitable for 32-bit addresses. Patched files ------------- flash.h + added set of 4-bytes address functions to flashchip structure definition flashrom.c + added switch to 4-bytes addressing more for chips which support it serprog.c + added 4-bytes addressing spi_nbyte_read call to serprog_spi_read spi.c + fixed flash chip size check in spi_chip_read spi25.c + added 4-bytes addressing spi_nbyte_read call to spi_read_chunked + added 4-bytes addressing spi_nbyte_program call to spi_write_chunked + added 4-bytes addressing spi_byte_program call to spi_chip_write_1 Conflicts: serprog.c Change-Id: Ib051cfc93bd4aa7580519e0e6206d025f3ca8049 Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014 [clg: ported from https://www.flashrom.org/pipermail/flashrom/2015-January/013205.html ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-on: https://review.coreboot.org/20505 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Rename programmer registration functionsCarl-Daniel Hailfinger2014-07-191-19/+19
| | | | | | | | | | | | Register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Corresponding to flashrom svn r1831. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add 'const' keyword to chip write and other function prototypesMark Marshall2014-05-091-6/+3
| | | | | | | | | | Corresponding to flashrom svn r1789. Inspired by and mostly based on a patch Signed-off-by: Mark Marshall <mark.marshall@omicron.at> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a bunch of new/tested stuff and various small changes 14Stefan Tauner2012-09-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Corresponding to flashrom svn r1601. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Make struct flashchip a field in struct flashctx instead of a complete copyCarl-Daniel Hailfinger2012-08-251-3/+3
| | | | | | | | | | | | All the driver conversion work and cleanup has been done by Stefan. flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel. Corresponding to flashrom svn r1579. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Let the programmer driver decide how to do AAI transfersNico Huber2012-06-151-1/+7
| | | | | | | | | | | | | | | | Currently spi_aai_write() is implemented without an abstraction mechanism for the programmer driver. This adds another function pointer 'write_aai' to struct spi_programmer, which is set to default_spi_write_aai (renamed spi_aai_write) for all programmers for now. A patch which utilises this abstraction in the dediprog driver will follow. Corresponding to flashrom svn r1543. Signed-off-by: Nico Huber <nico.huber@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Have all programmer init functions register bus masters/programmersCarl-Daniel Hailfinger2011-12-201-50/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All programmer types (Parallel, SPI, Opaque) now register themselves into a generic programmer list and probing is now programmer-centric instead of chip-centric. Registering multiple SPI/... masters at the same time is now possible without any problems. Handling multiple flash chips is still unchanged, but now we have the infrastructure to deal with "dual BIOS" and "one flash behind southbridge and one flash behind EC" sanely. A nice side effect is that this patch kills quite a few global variables and improves the situation for libflashrom. Hint for developers: struct {spi,par,opaque}_programmer now have a void *data pointer to store any additional programmer-specific data, e.g. hardware configuration info. Note: flashrom -f -c FOO -r forced_read.bin does not work anymore. We have to find an architecturally clean way to solve this. Corresponding to flashrom svn r1475. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add struct flashctx * parameter to all functions accessing flash chipsCarl-Daniel Hailfinger2011-12-181-17/+25
| | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use struct flashctx instead of struct flashchip for flash chip accessCarl-Daniel Hailfinger2011-12-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | Struct flashchip is used only for the flashchips array and for operations which do not access hardware, e.g. printing a list of supported flash chips. struct flashctx (flash context) contains all data available in struct flashchip, but it also contains runtime information like mapping addresses. struct flashctx is expected to grow additional members over time, a prime candidate being programmer info. struct flashctx contains all of struct flashchip with identical member layout, but struct flashctx has additional members at the end. The separation between struct flashchip/flashctx shrinks the memory requirement of the big flashchips array and allows future extension of flashctx without having to worry about bloat. Corresponding to flashrom svn r1473. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Unsignify lengths and addresses in chip functions and structsStefan Tauner2011-11-231-7/+7
| | | | | | | | | | Push those changes forward where needed to prevent new sign conversion warnings where possible. Corresponding to flashrom svn r1470. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revert "Unsignify lengths and addresses in chip functions and structs"Stefan Tauner2011-09-181-6/+6
| | | | | | | | | | | | | | | | | | | | - probe_timing was changed to unsigned although we use negative values for special cases - some code was not changed along hence did no longer compile: * dediprog's read and write functions * linux_spi's read and write functions - it introduced a number of new sign conversion warnings (http://paste.flashrom.org/view.php?id=832) To be safe this patch reverts all changes made in r1448, a corrected patch will follow later. Thanks to idwer for pointing out the problem first! Corresponding to flashrom svn r1450. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Unsignify lengths and addresses in chip functions and structsStefan Tauner2011-09-181-6/+6
| | | | | | | Corresponding to flashrom svn r1448. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Rename CHIP_BUSTYPE_FOO to BUS_FOOCarl-Daniel Hailfinger2011-07-271-1/+1
| | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Corresponding to flashrom svn r1396. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add a bunch of new/tested stuff and various small changes 6Stefan Tauner2011-07-261-1/+1
| | | | | | | | | | | | | | | | | - add J-7BXAN to the list of supported boards http://www.flashrom.org/pipermail/flashrom/2011-July/007397.html - fix urls, typos, whitespace etc. - fix counting of supported chips in the wiki output Corresponding to flashrom svn r1393. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> the last one is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> everything else is Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Kill central list of SPI programmersMichael Karcher2011-05-111-178/+26
| | | | | | | | | | | | | | | | | | Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Corresponding to flashrom svn r1299. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Factor out SPI write/read chunking wrappersMichael Karcher2011-05-111-23/+79
| | | | | | | Corresponding to flashrom svn r1298. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix and improve libpayload platform supportPatrick Georgi2011-03-081-0/+1
| | | | | | | | | | | | | | - Fix various minor compile issues (eg. include necessary standard headers) - Fix compilation of libpayload code paths - Provide libpayload support in Makefile - Add make target "libflashrom.a" which links non-CLI code to static library Corresponding to flashrom svn r1280. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Tested-with-DOS-crosscompiler-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Various IT85* cleanups and fixesCarl-Daniel Hailfinger2011-03-081-2/+2
| | | | | | | | | | | | | | | | | | | | Fix a few typos. Change the EC memory region mapping name. Drop unused function parameter. Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory locations instead of plain pointer access which is optimized away by gcc. Use own it85_* SPI high-level chip read/write functions instead of relying on unrelated ICH functions. Corresponding to flashrom svn r1279. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> David writes: I applied the patch against the Chromium OS branch and successfully tested read and write operations on a Cr48. Acked-by: David Hendricks <dhendrix@google.com>
* Update the ITE IT8500 EC support to match the current state of the ↵David Hendricks2011-02-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | flashrom-chromium tree This code has been deployed and tested to work on the Cr-48. There are a few caveats, though: - The boot BIOS straps register must be modified to select LPC. This can be done with the "select_bbs.sh" script (Install iotools at http://code.google.com/p/iotools/ before using select_bbs). - It is very important to disable power management daemons before running flashrom on this EC. I commented out the brute force method we use in the Chromium OS branch that disables powerd, since IIRC Carl-Daniel has a better approach in the works. - Due to dependencies which may be introduced by the OEM/ODM EC firmware, the code is not guaranteed to work for anything other than the Cr-48. Corresponding to flashrom svn r1263. Signed-off-by: David Hendricks <dhendrix@google.com> Carl-Daniel comments: Code is not hooked up yet because probing needs to be sorted out. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the Open Graphics Project development card, OGD1, as a SPI ↵Mark Marshall2010-12-031-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flash programmer The project is in the the process of designing and making a complete, open source, graphics card. More info at http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Corresponding to flashrom svn r1241. Signed-off-by: Mark Marshall <mark.marshall@csr.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add chunked write ability to the Dediprog SF100 driverCarl-Daniel Hailfinger2010-11-231-1/+1
| | | | | | | | | | | | | | Please note that the write speedup only applies to chips which have SPI page write (i.e. chips using spi_chip_write_256). This is a quick fix for write speed until I get around to implementing full bulk SPI write support. Corresponding to flashrom svn r1235. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Richard A. Smith <richard@laptop.org> Acked-by: Mathias Krause <mathias.krause@secunet.com>
* Switch all flash chips to partial writeCarl-Daniel Hailfinger2010-10-131-17/+3
| | | | | | | | | | | | | | | The inner write functions which handle partial write are renamed to the original name of their wrappers. The write wrappers are removed. Corresponding to flashrom svn r1211. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com> Tested-by: Andrew Morgan <ziltro@ziltro.com> Tested-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Idwer Vollering <vidwer@gmail.com> Tested-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Move implicit erase out of chip driversCarl-Daniel Hailfinger2010-10-081-6/+0
| | | | | | | | | | | | | | | | | | Flashrom had an implicit erase-on-write for most flash chip and programmer drivers, but it was not entirely consistent. Some drivers had their own hand-rolled partial update functionality which made handling partial updates from generic code impossible. Move implicit erase out of chip drivers, and kill some dead erase functions at the same time. A full chip erase is now performed in the generic code for all flash chips on write, and after that the whole chip is written. Corresponding to flashrom svn r1206. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Honor ICH SPI address window for readsCarl-Daniel Hailfinger2010-09-151-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | ICH SPI has the ability to restrict SPI read/write accesses to a given address range. The low end of the range is configurable by the BIOS (and by flashrom if the BIOS didn't lock down the flash interface), the high end of the range is 0xffffff (2^24-1). This patch checks for an address range restriction and uses the low end of the allowed range as base for SPI reads. A similar workaround for REMS/RES opcodes has been committed in r500. This fixes read on the Intel D945GCLF mainboard where the stock BIOS enforces a restricted address range. Please note that writes need the same fix, but for architectural reasons that fix will be merged once partial write is available. Corresponding to flashrom svn r1170. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested by David Hendricks on the Intel D945GCLF mainboard, results at http://paste.flashrom.org/view.php?id=79 Acked-by: David Hendricks <dhendrix@google.com>
* Add Intel Gigabit NIC SPI flashing supportIdwer Vollering2010-09-031-0/+9
| | | | | | | | | | | | | | | | | | | | Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware. The last line in nicintel_request_spibus() could be changed so that FL_BUSY is used instead. Shortened sample log: [...] Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0). Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000. Multiple flash chips were detected: M25P05.RES M25P10.RES Please specify which chip to use with the -c <chipname> option. [...] Corresponding to flashrom svn r1151. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add detailed status register printing and unlocking for all ATMEL AT25* chipsCarl-Daniel Hailfinger2010-07-291-2/+0
| | | | | | | | | | | | | | Add support for Atmel AT25DF081A and AT25DQ161. Some chips require EWSR before WRSR, others require WREN before WRSR, and some support both variants. Add feature_bits to select the correct SPI command, and default to EWSR. Corresponding to flashrom svn r1115. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Steven Rosario Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing supportCarl-Daniel Hailfinger2010-07-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Huge thanks go to Michael Karcher for reverse engineering the interface and to Johannes Sjölund for testing the first iterations of my patch on his hardware until it worked. Thanks to the following testers of the patch: * MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland * MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy * MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden * MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker * MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund * MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz * MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers * MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose * MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan * MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt * MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson" flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x SPI is detected. Corresponding to flashrom svn r1113. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for RayeR SPIPGM hardware as described in ↵Carl-Daniel Hailfinger2010-07-211-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://rayer.ic.cz/elektro/spipgm.htm To use the RayeR driver, run flashrom -p rayer_spi -V Known bugs/limitations: - Won't compile/work on non-x86 architectures. - Will always use direct port I/O access. Log follows: flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC 4.3.2, little endian Calibrating delay loop... OK. Initializing rayer_bitbang_spi programmer Using port 0x378 as I/O base for parallel port access. ... Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2015 ... Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address 0xffe00000. ... No operations were specified. Corresponding to flashrom svn r1093. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Martin Rehak <rayer@seznam.cz> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use generic unlocking infrastructure for SPI chipsCarl-Daniel Hailfinger2010-07-141-1/+0
| | | | | | | | | Actually check if the unlock worked instead of just assuming it worked. Corresponding to flashrom svn r1082. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use the max_rom_decode infrastructure for wbsio_spiCarl-Daniel Hailfinger2010-07-141-1/+1
| | | | | | | | | Use this instead of the open-coding variant that only aborts after it is too late. Corresponding to flashrom svn r1081. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Convert SPI chips to partial writeCarl-Daniel Hailfinger2010-07-141-5/+29
| | | | | | | | | | However, wrap the write functions in a compat layer to allow converting the rest of flashrom later. Tested on Intel NM10 by David Hendricks. Corresponding to flashrom svn r1080. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Kill global variables, constants and functions if local scope sufficesCarl-Daniel Hailfinger2010-07-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Prohibit registering programmer shutdown functions before init or after shutdown. Kill some dead code. Rename global variables with namespace-polluting names. Use a previously unused locking helper function in sst49lfxxxc.c. This is needed for libflashrom. Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments. Corresponding to flashrom svn r1068. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add SPI chip read support to the dummy flasherCarl-Daniel Hailfinger2010-06-201-1/+1
| | | | | | | | | This allows using the dummy flasher for SPI read debugging. Corresponding to flashrom svn r1053. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Fix message printing for SPI RES on spew levelCarl-Daniel Hailfinger2010-06-201-6/+10
| | | | | | | | | | Use a blacklist instead of a whitelist for 4-byte SPI RDID. Tell users where to report bugs. Corresponding to flashrom svn r1051. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* So far, we have up to 4 different names for the same thing (ignoring ↵Carl-Daniel Hailfinger2010-05-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | capitalization) CONFIG_FT2232SPI (makefile config option) FT2232_SPI_SUPPORT (#define) ft2232spi (programmer name) ft2232_spi.c (programmer file) Use CONFIG_* with underscores for makefile config options and #defines and kill the useless _SUPPORT idiom. Use lowercase names with underscores for programmer names and programmer files. With this, you can run "grep -i ft2232_spi" and find everything related to the ft2232_spi driver. Same applies to all other programmers. Corresponding to flashrom svn r1023. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Remove unneeded #include statements completelyCarl-Daniel Hailfinger2010-05-301-1/+0
| | | | | | | | | | | | | | | Unistd.h was only used to get a definition of NULL in all files. Add our own NULL #define and remove unistd.h from flash.h stdio.h has no place in flash.h, it should be included only in files which really need it. Add #include statements in individual .c files where needed. Replace a few printf with msg_* to eliminate the need for stdio.h. Corresponding to flashrom svn r1021. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* ichspi: try harder to conform to address restrictionsCarl-Daniel Hailfinger2010-05-281-2/+16
| | | | | | | | | | | | | | ICH SPI can enforce address restrictions for all accesses which take an address (well, it could if the chipset implementation was not broken). Since exploiting the broken implementation is harder than conforming to the address restrictions wherever possible, conform to the address restrictions instead. This patch eliminates a lot of transaction errors people were seeing on chip probe. Corresponding to flashrom svn r1016. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Handle the following architectures in generic flashrom codeCarl-Daniel Hailfinger2010-05-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - x86/x86_64 (little endian) - PowerPC (big endian) - MIPS (big+little endian) No changes to programmer specific code. This means any drivers with MMIO access will _not_ suddenly start working on big endian systems, but with this patch everything is in place to fix them. Compilation should work on all architectures listed above for all drivers except nic3com and nicrealtek which require PCI Port IO which is x86-only for now. To compile without nic3com and nicrealtek, run make distclean make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no Thanks to Misha Manulis for testing early versions of this patch on PowerPC (big endian) with the satasii programmer. Thanks to Segher Boessenkool for design review and for helping out with compiler tricks and pointing out that we need eieio on PowerPC. Thanks to Vladimir Serbinenko for compile testing on MIPS (little endian) and PowerPC (big endian) and for runtime testing on MIPS (little endian). Thanks to David Daney for compile testing on MIPS (big endian). Thanks to Uwe Hermann for compile and runtime testing on x86_64. DO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH! This patch only provides the infrastructure, but does not convert any drivers, so flashrom will compile, but it won't do the right thing on non-x86 platforms. Corresponding to flashrom svn r1013. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com> Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
* Convert various prints to use msg_p* and msg_g* respectivelySean Nelson2010-05-071-4/+4
| | | | | | | | | Convert programmer print messages to msg_p* convert general print messages to msg_g* a few fixes as suggested by Carl-Daniel. Corresponding to flashrom svn r997. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Multibyte SPI write for the Bus PirateCarl-Daniel Hailfinger2010-03-221-1/+1
| | | | | | | Corresponding to flashrom svn r964. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Split spi.c into programmer and chip code Remove chipdriver.h include from ↵Sean Nelson2010-02-261-935/+1
| | | | | | | | | | | | | | | | | | | flash.h Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c Corresponding to flashrom svn r914. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Ignore RES (1 byte) if chip replied to REMS (2 bytes)Carl-Daniel Hailfinger2010-02-121-4/+17
| | | | | | | | | | | | | | | | | | | SPI RES is the most unreliable way to identify chips because it only returns a 1-byte ID for most chips. For every given ID out there, probably a dozen incompatible flash chips match it. We already refuse to identify a chip with RES if that chip responds to RDID (3 bytes, good match), and with this patch we additionally refuse RES if the chip responds to REMS (2 bytes, still a good match). This increases matching accuracy a lot. Besides that, the RDID/REMS response checking has been cleaned up for better readability. Corresponding to flashrom svn r899. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Add write supportCarl-Daniel Hailfinger2010-01-221-0/+3
| | | | | | | | | | | Speed up reads by a factor of 4 by switching block size from 4 to 16. Add support for 4 byte RDID. Add USB error decoding via usb_strerror. Corresponding to flashrom svn r879. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Dediprog SF100 supportCarl-Daniel Hailfinger2010-01-191-0/+9
| | | | | | | | | | | | | | | | | | | | | | | Reverse engineered from USB logs. I never touched that programmer nor did I ever see the associated software. Disabled by default until it is complete. The driver needs to be hooked up to the SPI core before it will do anything besides init and diagnostics. I successfully reverse engineered all commands, but some are still somewhat magic. Logs from "flashrom -p dediprog -V" are appreciated. Probe and read should work, erase/write is expected to explode. The programmer will set voltage to 0 on exit. Thanks a lot to Stefan Reinauer and Patrick Georgi for providing USB logs and for testing the result. Corresponding to flashrom svn r870. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
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