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| author | Anson Huang <Anson.Huang@freescale.com> | 2015-12-07 10:09:19 +0100 |
|---|---|---|
| committer | Zefan Li <lizefan@huawei.com> | 2016-10-26 23:15:38 +0800 |
| commit | 0629784cfde7ab2adf0118c981271e48aeeb6dbd (patch) | |
| tree | 09dce8bc8aba8e17c141326e47275f8dd20bbe3d | |
| parent | efd171004345809f4f4ce7e147028d865ab78f68 (diff) | |
| download | linux-stable-0629784cfde7ab2adf0118c981271e48aeeb6dbd.tar.gz linux-stable-0629784cfde7ab2adf0118c981271e48aeeb6dbd.tar.bz2 linux-stable-0629784cfde7ab2adf0118c981271e48aeeb6dbd.zip | |
ARM: 8471/1: need to save/restore arm register(r11) when it is corrupted
commit fa0708b320f6da4c1104fe56e01b7abf66fd16ad upstream.
In cpu_v7_do_suspend routine, r11 is used while it is NOT
saved/restored, different compiler may have different usage
of ARM general registers, so it may cause issues during
calling cpu_v7_do_suspend.
We meet kernel fault occurs when using GCC 4.8.3, r11 contains
valid value before calling into cpu_v7_do_suspend, but when returned
from this routine, r11 is corrupted and lead to kernel fault.
Doing save/restore for those corrupted registers is a must in
assemble code.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[lizf: Backported to 3.4: adjust context]
Signed-off-by: Zefan Li <lizefan@huawei.com>
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index fb489cc56713..74c3e53092e7 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -94,7 +94,7 @@ ENDPROC(cpu_v7_dcache_clean_area) .equ cpu_v7_suspend_size, 4 * 8 #ifdef CONFIG_ARM_CPU_SUSPEND ENTRY(cpu_v7_do_suspend) - stmfd sp!, {r4 - r10, lr} + stmfd sp!, {r4 - r11, lr} mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID stmia r0!, {r4 - r5} @@ -105,7 +105,7 @@ ENTRY(cpu_v7_do_suspend) mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control stmia r0, {r6 - r11} - ldmfd sp!, {r4 - r10, pc} + ldmfd sp!, {r4 - r11, pc} ENDPROC(cpu_v7_do_suspend) ENTRY(cpu_v7_do_resume) |