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authorHeiner Kallweit <hkallweit1@gmail.com>2017-02-15 20:31:55 +0100
committerJonathan Cameron <jic23@kernel.org>2017-02-19 12:53:27 +0000
commit6a882a2cbeb09b7c32610a644d5915d17b80b617 (patch)
tree8d0e7036d3a9b3045b6813638bef100ca47b9ddd
parent3af109131b7eb880ba0711344912d7a523a812b4 (diff)
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iio: adc: meson-saradc: improve meson_sar_adc_read_raw_sample
After sampling there should always be only one value in the FIFO. This also applies to averaging mode as the averaging is done chip-internally. So we don't have to loop and let the driver complain if there's not exactly one value in the FIFO. If the value belongs to a different channel then don't silently swallow the value but complain. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-rw-r--r--drivers/iio/adc/meson_saradc.c36
1 files changed, 17 insertions, 19 deletions
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
index 9f186de24cd7..cde9ca7a01b8 100644
--- a/drivers/iio/adc/meson_saradc.c
+++ b/drivers/iio/adc/meson_saradc.c
@@ -278,33 +278,31 @@ static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev,
int *val)
{
struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
- int regval, fifo_chan, fifo_val, sum = 0, count = 0;
+ int regval, fifo_chan, fifo_val, count;
if(!wait_for_completion_timeout(&priv->done,
msecs_to_jiffies(MESON_SAR_ADC_TIMEOUT)))
return -ETIMEDOUT;
- while (meson_sar_adc_get_fifo_count(indio_dev) > 0 &&
- count < MESON_SAR_ADC_MAX_FIFO_SIZE) {
- regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, &regval);
-
- fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK,
- regval);
- if (fifo_chan != chan->channel)
- continue;
-
- fifo_val = FIELD_GET(MESON_SAR_ADC_FIFO_RD_SAMPLE_VALUE_MASK,
- regval);
- fifo_val &= (BIT(priv->data->resolution) - 1);
-
- sum += fifo_val;
- count++;
+ count = meson_sar_adc_get_fifo_count(indio_dev);
+ if (count != 1) {
+ dev_err(&indio_dev->dev,
+ "ADC FIFO has %d element(s) instead of one\n", count);
+ return -EINVAL;
}
- if (!count)
- return -ENOENT;
+ regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, &regval);
+ fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, regval);
+ if (fifo_chan != chan->channel) {
+ dev_err(&indio_dev->dev,
+ "ADC FIFO entry belongs to channel %d instead of %d\n",
+ fifo_chan, chan->channel);
+ return -EINVAL;
+ }
- *val = sum / count;
+ fifo_val = FIELD_GET(MESON_SAR_ADC_FIFO_RD_SAMPLE_VALUE_MASK, regval);
+ fifo_val &= GENMASK(priv->data->resolution - 1, 0);
+ *val = fifo_val;
return 0;
}