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author | Su Sung Chung <Su.Chung@amd.com> | 2019-01-21 12:01:53 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-02-05 21:16:23 -0500 |
commit | 8dac4e7d89ea3b09695c0948d375a62df9443ca0 (patch) | |
tree | 3b1b7c43b42c32bdc3f02c313e59d165946b266b | |
parent | 4f69bc8c16f02478717ab5708d106d86e6f9db68 (diff) | |
download | linux-stable-8dac4e7d89ea3b09695c0948d375a62df9443ca0.tar.gz linux-stable-8dac4e7d89ea3b09695c0948d375a62df9443ca0.tar.bz2 linux-stable-8dac4e7d89ea3b09695c0948d375a62df9443ca0.zip |
drm/amd/display: store timing sync info in dc_stream_status
in program_timing_sync, after all the pipes are
grouped, store timing sync info in dc_stream_status
Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_stream.h | 6 |
2 files changed, 21 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index d8579b207300..d9f62befd86a 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -869,8 +869,9 @@ static void program_timing_sync( struct dc *dc, struct dc_state *ctx) { - int i, j; + int i, j, k; int group_index = 0; + int num_group = 0; int pipe_count = dc->res_pool->pipe_count; struct pipe_ctx *unsynced_pipes[MAX_PIPES] = { NULL }; @@ -922,6 +923,18 @@ static void program_timing_sync( } } + + for (k = 0; k < group_size; k++) { + struct dc_stream_status *status = dc_stream_get_status_from_state(ctx, pipe_set[k]->stream); + + status->timing_sync_info.group_id = num_group; + status->timing_sync_info.group_size = group_size; + if (k == 0) + status->timing_sync_info.master = true; + else + status->timing_sync_info.master = false; + + } /* remove any other pipes with plane as they have already been synced */ for (j = j + 1; j < group_size; j++) { if (pipe_set[j]->plane_state) { @@ -936,6 +949,7 @@ static void program_timing_sync( dc, group_index, group_size, pipe_set); group_index++; } + num_group++; } } diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h index 0de6d7f377a6..2d1f2825de09 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_stream.h +++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h @@ -32,11 +32,17 @@ /******************************************************************************* * Stream Interfaces ******************************************************************************/ +struct timing_sync_info { + int group_id; + int group_size; + bool master; +}; struct dc_stream_status { int primary_otg_inst; int stream_enc_inst; int plane_count; + struct timing_sync_info timing_sync_info; struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; }; |