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| author | Alexander Graf <agraf@suse.de> | 2014-04-25 16:07:21 +0200 |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2016-10-17 09:35:09 +0200 |
| commit | cf28bd0ce8c6f14374c8747bbcb73f1d0afd6d91 (patch) | |
| tree | 98fc8b514b412dae530862ffe32929830b95f647 | |
| parent | 3bf7e13f8efaddeb67174fe66537a2eab35544a2 (diff) | |
| download | linux-stable-cf28bd0ce8c6f14374c8747bbcb73f1d0afd6d91.tar.gz linux-stable-cf28bd0ce8c6f14374c8747bbcb73f1d0afd6d91.tar.bz2 linux-stable-cf28bd0ce8c6f14374c8747bbcb73f1d0afd6d91.zip | |
KVM: PPC: Book3S PR: Emulate TIR register
commit a5948fa092a04dfd6b9ee31c99eb6896c158eb08 upstream.
In parallel to the Processor ID Register (PIR) threaded POWER8 also adds a
Thread ID Register (TIR). Since PR KVM doesn't emulate more than one thread
per core, we can just always expose 0 here.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
| -rw-r--r-- | arch/powerpc/kvm/book3s_emulate.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c index 57913b199919..cda2cba56915 100644 --- a/arch/powerpc/kvm/book3s_emulate.c +++ b/arch/powerpc/kvm/book3s_emulate.c @@ -570,6 +570,7 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) case SPRN_MMCR0: case SPRN_MMCR1: case SPRN_MMCR2: + case SPRN_TIR: #endif *spr_val = 0; break; |