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| author | Huang Shijie <b32955@freescale.com> | 2013-08-27 17:29:04 +0800 |
|---|---|---|
| committer | Brian Norris <computersforpeace@gmail.com> | 2013-11-06 23:33:01 -0800 |
| commit | d159d8b7074181b154643aa15347d65a36b7ab59 (patch) | |
| tree | 45d0fa0deaf29969b0178b08862d5df22d195acc | |
| parent | 4af9874916b14db407bee18590fe1847f541c2e2 (diff) | |
| download | linux-stable-d159d8b7074181b154643aa15347d65a36b7ab59.tar.gz linux-stable-d159d8b7074181b154643aa15347d65a36b7ab59.tar.bz2 linux-stable-d159d8b7074181b154643aa15347d65a36b7ab59.zip | |
mtd: gpmi: decouple the chip select from the DMA channel
Decouple the chip select from the DMA channel, we use the DMA channel 0
to accecc all the nand devices.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| -rw-r--r-- | drivers/mtd/nand/gpmi-nand/gpmi-lib.c | 6 | ||||
| -rw-r--r-- | drivers/mtd/nand/gpmi-nand/gpmi-regs.h | 3 |
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c index 4f8857fa48a7..7d56d87599c0 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c +++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c @@ -187,6 +187,12 @@ int gpmi_init(struct gpmi_nand_data *this) /* Select BCH ECC. */ writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET); + /* + * Decouple the chip select from dma channel. We use dma0 for all + * the chips. + */ + writel(BM_GPMI_CTRL1_DECOUPLE_CS, r->gpmi_regs + HW_GPMI_CTRL1_SET); + gpmi_disable_clk(this); return 0; err_out: diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-regs.h b/drivers/mtd/nand/gpmi-nand/gpmi-regs.h index 53397cc290fc..82114cdc8330 100644 --- a/drivers/mtd/nand/gpmi-nand/gpmi-regs.h +++ b/drivers/mtd/nand/gpmi-nand/gpmi-regs.h @@ -108,6 +108,9 @@ #define HW_GPMI_CTRL1_CLR 0x00000068 #define HW_GPMI_CTRL1_TOG 0x0000006c +#define BP_GPMI_CTRL1_DECOUPLE_CS 24 +#define BM_GPMI_CTRL1_DECOUPLE_CS (1 << BP_GPMI_CTRL1_DECOUPLE_CS) + #define BP_GPMI_CTRL1_WRN_DLY_SEL 22 #define BM_GPMI_CTRL1_WRN_DLY_SEL (0x3 << BP_GPMI_CTRL1_WRN_DLY_SEL) #define BF_GPMI_CTRL1_WRN_DLY_SEL(v) \ |