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| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-06-26 10:06:02 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-07-22 09:22:24 +0200 |
| commit | 05acadf9c356ccb3eb951a6ac3e7df0cfa87104e (patch) | |
| tree | 3e71340929e2a77dc3e109ef910b9b329fcb35fb | |
| parent | c5b5101aeb7a65a9b67ba3f4f7437b951cf2bc59 (diff) | |
| download | linux-stable-05acadf9c356ccb3eb951a6ac3e7df0cfa87104e.tar.gz linux-stable-05acadf9c356ccb3eb951a6ac3e7df0cfa87104e.tar.bz2 linux-stable-05acadf9c356ccb3eb951a6ac3e7df0cfa87104e.zip | |
ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
[ Upstream commit d7adfe5ffed9faa05f8926223086b101e14f700d ]
Fix dtschema validator warnings like:
l2-cache@fffff000: $nodename:0:
'l2-cache@fffff000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Fixes: 475dc86d08de ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 10d2fa183a9f..7ee99e11508c 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -706,7 +706,7 @@ }; }; - L2: l2-cache@fffef000 { + L2: cache-controller@fffef000 { compatible = "arm,pl310-cache"; reg = <0xfffef000 0x1000>; interrupts = <0 38 0x04>; diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index bd1985694bca..672e73e35228 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -606,7 +606,7 @@ reg = <0xffcfb100 0x80>; }; - L2: l2-cache@fffff000 { + L2: cache-controller@fffff000 { compatible = "arm,pl310-cache"; reg = <0xfffff000 0x1000>; interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; |