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| author | Elaine Zhang <zhangqing@rock-chips.com> | 2021-04-17 13:29:40 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-07-28 11:12:13 +0200 |
| commit | 2a2ffbf52a1828320834004962372a8b230ef938 (patch) | |
| tree | 200378cc653272b0359257a0d46cc8154b813ada | |
| parent | bc36a064f66a065499ed46dd212183af65350f7d (diff) | |
| download | linux-stable-2a2ffbf52a1828320834004962372a8b230ef938.tar.gz linux-stable-2a2ffbf52a1828320834004962372a8b230ef938.tar.bz2 linux-stable-2a2ffbf52a1828320834004962372a8b230ef938.zip | |
ARM: dts: rockchip: Fix power-controller node names for rk3288
[ Upstream commit 970cdc53cb1afa73602028c103dbfb6a230080be ]
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-4-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 8abf0990c691..9adb58930c08 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -745,7 +745,7 @@ * *_HDMI HDMI * *_MIPI_* MIPI */ - pd_vio@RK3288_PD_VIO { + power-domain@RK3288_PD_VIO { reg = <RK3288_PD_VIO>; clocks = <&cru ACLK_IEP>, <&cru ACLK_ISP>, @@ -787,7 +787,7 @@ * Note: The following 3 are HEVC(H.265) clocks, * and on the ACLK_HEVC_NIU (NOC). */ - pd_hevc@RK3288_PD_HEVC { + power-domain@RK3288_PD_HEVC { reg = <RK3288_PD_HEVC>; clocks = <&cru ACLK_HEVC>, <&cru SCLK_HEVC_CABAC>, @@ -801,7 +801,7 @@ * (video endecoder & decoder) clocks that on the * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC). */ - pd_video@RK3288_PD_VIDEO { + power-domain@RK3288_PD_VIDEO { reg = <RK3288_PD_VIDEO>; clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; @@ -812,7 +812,7 @@ * Note: ACLK_GPU is the GPU clock, * and on the ACLK_GPU_NIU (NOC). */ - pd_gpu@RK3288_PD_GPU { + power-domain@RK3288_PD_GPU { reg = <RK3288_PD_GPU>; clocks = <&cru ACLK_GPU>; pm_qos = <&qos_gpu_r>, |