diff options
| author | Jon Mason <jon.mason@broadcom.com> | 2016-11-04 01:10:56 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-11-07 13:11:21 -0500 |
| commit | 5b4e2900512321435a5cd7dd77f58f23f3109950 (patch) | |
| tree | 89b1a77887873f51633a0914b6e799cb8d24cafa | |
| parent | 94edc86bf13f270a0ce08bf61caf5f464057a474 (diff) | |
| download | linux-stable-5b4e2900512321435a5cd7dd77f58f23f3109950.tar.gz linux-stable-5b4e2900512321435a5cd7dd77f58f23f3109950.tar.bz2 linux-stable-5b4e2900512321435a5cd7dd77f58f23f3109950.zip | |
net: phy: broadcom: add bcm54xx_auxctl_read
Add a helper function to read the AUXCTL register for the BCM54xx. This
mirrors the bcm54xx_auxctl_write function already present in the code.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/phy/broadcom.c | 10 | ||||
| -rw-r--r-- | include/linux/brcmphy.h | 1 |
2 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 583ef8a2ec8d..3a64b3d8eca8 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -30,6 +30,16 @@ MODULE_DESCRIPTION("Broadcom PHY driver"); MODULE_AUTHOR("Maciej W. Rozycki"); MODULE_LICENSE("GPL"); +static int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum) +{ + /* The register must be written to both the Shadow Register Select and + * the Shadow Read Register Selector + */ + phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | + regnum << MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT); + return phy_read(phydev, MII_BCM54XX_AUX_CTL); +} + static int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val) { return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val); diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h index 60def78c4e12..0ed66914b61c 100644 --- a/include/linux/brcmphy.h +++ b/include/linux/brcmphy.h @@ -110,6 +110,7 @@ #define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 #define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 +#define MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT 12 #define MII_BCM54XX_AUXCTL_SHDWSEL_MASK 0x0007 |