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authorScott Wood <scottwood@freescale.com>2015-10-06 22:48:06 -0500
committerScott Wood <scottwood@freescale.com>2015-10-17 00:36:36 -0500
commit9f640bf5321dff6af69016d8fe753efa6b2f3e72 (patch)
treef3d00edd680e1f54c6223e81425852f1f7ccd4ad
parent01c593d749f4764a87abd8efa397976f2adb8f49 (diff)
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powerpc/fsl-corenet: Disable coreint if kexec is enabled
Problems have been observed in coreint (EPR) mode if interrupts are left pending (due to the lack of device quiescence with kdump) after having tried to deliver to a CPU but unable to deliver due to MSR[EE] -- interrupts no longer get reliably delivered in the new kernel. I tried various ways of fixing it up inside the crash kernel itself, and none worked (including resetting the entire mpic). Masking all interrupts and issuing EOIs in the crashing kernel did help a lot of the time, but the behavior was not consistent. Thus, stick to standard IACK mode when kdump is a possibility. Signed-off-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--arch/powerpc/platforms/85xx/corenet_generic.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index 3a8be47c0e3a..46d05c94add6 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -216,10 +216,12 @@ define_machine(corenet_generic) {
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
/*
- * Core reset may cause issue if using the proxy mode of MPIC.
+ * Core reset may cause issues if using the proxy mode of MPIC.
* So, use the mixed mode of MPIC if enabling CPU hotplug.
+ *
+ * Likewise, problems have been seen with kexec when coreint is enabled.
*/
-#ifdef CONFIG_HOTPLUG_CPU
+#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_KEXEC)
.get_irq = mpic_get_irq,
#else
.get_irq = mpic_get_coreint_irq,