summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBorislav Petkov <bp@suse.de>2020-06-18 20:25:25 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2020-07-09 09:35:07 +0200
commite9db4c6d559e6179f67dc1a4262c6e8666665dde (patch)
treef3b059a78b9e5dd7395d7bc6f2bfc8cb0c375793
parent6c83e22fc4614898ea8437fe005e07b0ce329de4 (diff)
downloadlinux-stable-e9db4c6d559e6179f67dc1a4262c6e8666665dde.tar.gz
linux-stable-e9db4c6d559e6179f67dc1a4262c6e8666665dde.tar.bz2
linux-stable-e9db4c6d559e6179f67dc1a4262c6e8666665dde.zip
EDAC/amd64: Read back the scrub rate PCI register on F15h
[ Upstream commit ee470bb25d0dcdf126f586ec0ae6dca66cb340a4 ] Commit: da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h") added support for F15h, model 0x60 CPUs but in doing so, missed to read back SCRCTRL PCI config register on F15h CPUs which are *not* model 0x60. Add that read so that doing $ cat /sys/devices/system/edac/mc/mc0/sdram_scrub_rate can show the previously set DRAM scrub rate. Fixes: da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h") Reported-by: Anders Andersson <pipatron@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> #v4.4.. Link: https://lkml.kernel.org/r/CAKkunMbNWppx_i6xSdDHLseA2QQmGJqj_crY=NF-GZML5np4Vw@mail.gmail.com Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r--drivers/edac/amd64_edac.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 932ba7676183..5f86075e34da 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -248,6 +248,8 @@ static int get_scrub_rate(struct mem_ctl_info *mci)
if (pvt->model == 0x60)
amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval);
+ else
+ amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
} else
amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);