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author | Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com> | 2019-02-01 13:02:27 +0530 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-05-08 07:22:58 +0200 |
commit | 7a7b0c0ee92fa305b445102e9457884c04d02e31 (patch) | |
tree | fea437e4370a1321556f576314715394f640979f | |
parent | 8f2b774cbf81603a8146fb2e2d92dc88001fafec (diff) | |
download | linux-stable-7a7b0c0ee92fa305b445102e9457884c04d02e31.tar.gz linux-stable-7a7b0c0ee92fa305b445102e9457884c04d02e31.tar.bz2 linux-stable-7a7b0c0ee92fa305b445102e9457884c04d02e31.zip |
platform/x86: intel_pmc_core: Fix PCH IP name
commit d6827015e671cd17871c9b7a0fabe06c044f7470 upstream.
For Cannonlake and Icelake, the IP name for Res_6 should be SPF i.e.
South Port F. No functional change is intended other than just renaming
the IP appropriately.
Cc: "David E. Box" <david.e.box@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Fixes: 291101f6a735 ("platform/x86: intel_pmc_core: Add CannonLake PCH support")
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/platform/x86/intel_pmc_core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index a9cbe5be277b..af6f7aece2e7 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -205,7 +205,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"CNVI", BIT(3)}, {"UFS0", BIT(4)}, {"EMMC", BIT(5)}, - {"Res_6", BIT(6)}, + {"SPF", BIT(6)}, {"SBR6", BIT(7)}, {"SBR7", BIT(0)}, |